diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c5db8c9712e1..632167824307 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21508,40 +21508,18 @@ ix86_md_asm_adjust (vec &outputs, vec &/*inputs*/, continue; } - if (dest_mode == DImode && !TARGET_64BIT) - dest_mode = SImode; - - if (dest_mode != QImode) - { - rtx destqi = gen_reg_rtx (QImode); - emit_insn (gen_rtx_SET (destqi, x)); - - if (TARGET_ZERO_EXTEND_WITH_AND - && optimize_function_for_speed_p (cfun)) - { - x = force_reg (dest_mode, const0_rtx); - - emit_insn (gen_movstrictqi (gen_lowpart (QImode, x), destqi)); - } - else - { - x = gen_rtx_ZERO_EXTEND (dest_mode, destqi); - if (dest_mode == GET_MODE (dest) - && !register_operand (dest, GET_MODE (dest))) - x = force_reg (dest_mode, x); - } - } - - if (dest_mode != GET_MODE (dest)) - { - rtx tmp = gen_reg_rtx (SImode); - - emit_insn (gen_rtx_SET (tmp, x)); - emit_insn (gen_zero_extendsidi2 (dest, tmp)); - } - else + if (dest_mode == QImode) emit_insn (gen_rtx_SET (dest, x)); + else + { + rtx reg = gen_reg_rtx (QImode); + emit_insn (gen_rtx_SET (reg, x)); + + reg = convert_to_mode (dest_mode, reg, 1); + emit_move_insn (dest, reg); + } } + rtx_insn *seq = get_insns (); end_sequence (); diff --git a/gcc/testsuite/gcc.target/i386/pr98086.c b/gcc/testsuite/gcc.target/i386/pr98086.c new file mode 100644 index 000000000000..254a3b9bef6c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr98086.c @@ -0,0 +1,17 @@ +/* PR target/98086 */ +/* { dg-do compile } */ +/* { dg-options "" } */ + +#ifdef __x86_64__ +typedef __int128 T; +#else +typedef long long T; +#endif + +T x; + +void +foo (void) +{ + __asm ("" : "=@ccc" (x)); +}