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re PR target/23809 (Misleading documentation for -mmmx/msse/...)

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2005-10-05  Billy Biggs  <billy.biggs@gmail.com>
	    Paolo Bonzini  <bonzini@gnu.org>

	PR target/23809

	* doc/extend.texi (x86 Built-ins): Document that -msse and friends
	enable the instructions and not just the built-ins.
	* doc/invoke.texi (x86 Options): Likewise.

Co-Authored-By: Paolo Bonzini <bonzini@gnu.org>

From-SVN: r104979
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Billy Biggs 2005-10-05 08:27:44 +00:00 committed by Paolo Bonzini
parent 1061f99e78
commit 7557687136
3 changed files with 29 additions and 7 deletions
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gcc/ChangeLog
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@ -1,3 +1,12 @@
2005-10-05 Billy Biggs <billy.biggs@gmail.com>
Paolo Bonzini <bonzini@gnu.org>
PR target/23809
* doc/extend.texi (x86 Built-ins): Document that -msse and friends
enable the instructions and not just the built-ins.
* doc/invoke.texi (x86 Options): Likewise.
2005-10-04 Geoffrey Keating <geoffk@apple.com>
* config/i386/t-darwin (SHLIB_VERPFX): Fix typo.

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gcc/doc/extend.texi
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@ -6466,6 +6466,14 @@ into the data cache. The instruction will be issued in slot I1@.
These built-in functions are available for the i386 and x86-64 family
of computers, depending on the command-line switches used.
Note that, if you specify command-line switches such as @option{-msse},
the compiler could use the extended instruction sets even if the built-ins
are not used explicitly in the program. For this reason, applications
which perform runtime CPU detection must compile separate files for each
supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without
these options.
The following machine modes are available for use with MMX built-in functions
(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32-bit integers,
@code{V4HI} for a vector of four 16-bit integers, and @code{V8QI} for a

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gcc/doc/invoke.texi
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@ -9261,15 +9261,20 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@opindex mno-sse
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of built-in functions that allow
direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
instruction set.
@xref{X86 Built-in Functions}, for details of the functions enabled
and disabled by these switches.
These switches enable or disable the use of instructions in the MMX,
SSE, SSE2 or 3DNow! extended instruction sets. These extensions are
also available as built-in functions: see @ref{X86 Built-in Functions},
for details of the functions enabled and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-point
code, see @option{-mfpmath=sse}.
code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
These options will enable GCC to use these extended instructions in
generated code, even without @option{-mfpmath=sse}. Applications which
perform runtime CPU detection must compile separate files for each
supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without
these options.
@item -mpush-args
@itemx -mno-push-args