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rs6000.md (define_splits): Kill unused constraints.
* rs6000.md (define_splits): Kill unused constraints. * function.c (thread_prologue_and_epilogue_insns): Kill code dealing with non-existent CFG. From-SVN: r44548
This commit is contained in:
Jan Hubicka
parent
ec5c56db8b
commit
75540af074
@ -1,3 +1,13 @@
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Wed Aug 1 20:01:42 CEST 2001 Jan Hubicka <jh@suse.cz>
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* rs6000.md (define_splits): Kill unused constraints.
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Wed Aug 1 20:02:12 CEST 2001 Graham Stott <grahams@redhat.com>
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Jan Hubicka <jh@suse.cz>
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* function.c (thread_prologue_and_epilogue_insns): Kill code
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dealing with non-existent CFG.
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2001-08-01 Kazu Hirata <kazu@hxi.com>
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* alias.c: Fix comment formatting.
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@ -1955,9 +1955,9 @@
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[(set_attr "length" "12")])
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(define_split
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[(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
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(clobber (match_scratch:SI 2 "=&r,&r"))]
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))))
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(clobber (match_scratch:SI 2 ""))]
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"! TARGET_POWER && reload_completed"
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[(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
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(set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
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@ -2737,8 +2737,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(match_operand:SI 1 "gpc_reg_operand" "%r,r")
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(match_operand:SI 2 "gpc_reg_operand" "r,r")])
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[(match_operand:SI 1 "gpc_reg_operand" "")
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:SI 3 ""))]
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"! TARGET_POWERPC64 && reload_completed"
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@ -2764,12 +2764,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(match_operand:SI 1 "gpc_reg_operand" "%r,r")
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(match_operand:SI 2 "gpc_reg_operand" "r,r")])
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[(match_operand:SI 1 "gpc_reg_operand" "")
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:SI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"! TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -2825,8 +2825,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
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(match_operand:SI 2 "gpc_reg_operand" "r")])
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:SI 3 ""))]
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"! TARGET_POWERPC64 && reload_completed"
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@ -2852,12 +2852,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
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(match_operand:SI 2 "gpc_reg_operand" "r,r")])
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:SI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"! TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -2891,8 +2891,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
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(not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))])
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
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(const_int 0)))
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(clobber (match_scratch:SI 3 ""))]
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"! TARGET_POWERPC64 && reload_completed"
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@ -2918,12 +2918,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
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(not:SI (match_operand:SI 2 "gpc_reg_operand" "r,r"))])
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:SI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"! TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -5197,12 +5197,12 @@
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(define_split
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
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(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
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(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
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"(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
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(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
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(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
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"
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@ -5861,9 +5861,9 @@
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[(set_attr "length" "12")])
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(define_split
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[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
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(abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
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(clobber (match_scratch:DI 2 "=&r,&r"))]
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[(set (match_operand:DI 0 "gpc_reg_operand" "")
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(abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
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(clobber (match_scratch:DI 2 ""))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
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(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
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@ -5879,9 +5879,9 @@
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[(set_attr "length" "12")])
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(define_split
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[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
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(clobber (match_scratch:DI 2 "=&r,&r"))]
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[(set (match_operand:DI 0 "gpc_reg_operand" "")
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(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))))
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(clobber (match_scratch:DI 2 ""))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
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(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
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@ -6972,8 +6972,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(match_operand:DI 1 "gpc_reg_operand" "%r,r")
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(match_operand:DI 2 "gpc_reg_operand" "r,r")])
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[(match_operand:DI 1 "gpc_reg_operand" "")
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_POWERPC64 && reload_completed"
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@ -6999,12 +6999,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(match_operand:DI 1 "gpc_reg_operand" "%r,r")
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(match_operand:DI 2 "gpc_reg_operand" "r,r")])
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[(match_operand:DI 1 "gpc_reg_operand" "")
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -7072,8 +7072,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
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(match_operand:DI 2 "gpc_reg_operand" "r")])
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_POWERPC64 && reload_completed"
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@ -7099,12 +7099,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
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(match_operand:DI 2 "gpc_reg_operand" "r,r")])
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -7138,8 +7138,8 @@
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
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(not:DI (match_operand:DI 2 "gpc_reg_operand" "r"))])
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
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(const_int 0)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_POWERPC64 && reload_completed"
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@ -7165,12 +7165,12 @@
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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[(set (match_operand:CC 3 "cc_reg_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
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(not:DI (match_operand:DI 2 "gpc_reg_operand" "r,r"))])
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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@ -7255,9 +7255,9 @@
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;; Used by sched, shorten_branches and final when the GOT pseudo reg
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;; didn't get allocated to a hard register.
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(define_split
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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[(set (match_operand:SI 0 "gpc_reg_operand" "")
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(unspec:SI [(match_operand:SI 1 "got_no_const_operand" "")
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(match_operand:SI 2 "memory_operand" "m")] 8))]
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(match_operand:SI 2 "memory_operand" "")] 8))]
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"(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
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&& flag_pic == 1
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&& (reload_in_progress || reload_completed)"
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@ -7211,20 +7211,14 @@ thread_prologue_and_epilogue_insns (f)
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seq = gen_sequence ();
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end_sequence ();
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/* If optimization is off, and perhaps in an empty function,
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the entry block will have no successors. */
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if (ENTRY_BLOCK_PTR->succ)
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{
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/* Can't deal with multiple successsors of the entry block. */
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if (ENTRY_BLOCK_PTR->succ->succ_next)
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abort ();
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/* Can't deal with multiple successsors of the entry block
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at the moment. Function should always have at least one
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entry point. */
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if (!ENTRY_BLOCK_PTR->succ || ENTRY_BLOCK_PTR->succ->succ_next)
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abort ();
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insert_insn_on_edge (seq, ENTRY_BLOCK_PTR->succ);
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inserted = 1;
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}
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else
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set_block_for_new_insns (emit_insn_after (seq, f),
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ENTRY_BLOCK_PTR->succ);
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insert_insn_on_edge (seq, ENTRY_BLOCK_PTR->succ);
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inserted = 1;
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}
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#endif
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