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vqshlu_n.c: New file.
2015-05-19 Christophe Lyon <christophe.lyon@linaro.org> * gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c: New file. From-SVN: r223384
This commit is contained in:
Christophe Lyon
Christophe Lyon
parent
e5561c83d6
commit
72cdfda4fa
gcc/testsuite
@ -1,3 +1,7 @@
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2015-05-19 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c: New file.
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2015-05-19 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vqshl_n.c: New file.
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263
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c
Normal file
263
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c
Normal file
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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/* Expected values of cumulative_saturation flag with negative
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input. */
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int VECT_VAR(expected_cumulative_sat_neg,int,8,8) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,16,4) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,32,2) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,64,1) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,8,16) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 1;
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int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 1;
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/* Expected results with negative input. */
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VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,64,1) [] = { 0x0 };
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VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg,uint,64,2) [] = { 0x0, 0x0 };
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/* Expected values of cumulative_saturation flag with shift by 1. */
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int VECT_VAR(expected_cumulative_sat_sh1,int,8,8) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,16,4) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,32,2) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,64,1) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,8,16) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,16,8) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,32,4) = 0;
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int VECT_VAR(expected_cumulative_sat_sh1,int,64,2) = 0;
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/* Expected results with shift by 1. */
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VECT_VAR_DECL(expected_sh1,uint,8,8) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
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0xfe, 0xfe, 0xfe, 0xfe };
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VECT_VAR_DECL(expected_sh1,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe };
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VECT_VAR_DECL(expected_sh1,uint,32,2) [] = { 0xfffffffe, 0xfffffffe };
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VECT_VAR_DECL(expected_sh1,uint,64,1) [] = { 0xfffffffffffffffe };
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VECT_VAR_DECL(expected_sh1,uint,8,16) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
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0xfe, 0xfe, 0xfe, 0xfe,
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0xfe, 0xfe, 0xfe, 0xfe,
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0xfe, 0xfe, 0xfe, 0xfe };
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VECT_VAR_DECL(expected_sh1,uint,16,8) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe,
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0xfffe, 0xfffe, 0xfffe, 0xfffe };
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VECT_VAR_DECL(expected_sh1,uint,32,4) [] = { 0xfffffffe, 0xfffffffe,
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0xfffffffe, 0xfffffffe };
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VECT_VAR_DECL(expected_sh1,uint,64,2) [] = { 0xfffffffffffffffe,
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0xfffffffffffffffe };
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/* Expected values of cumulative_saturation flag with shift by 2. */
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int VECT_VAR(expected_cumulative_sat_sh2,int,8,8) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,16,4) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,32,2) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,64,1) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,8,16) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,16,8) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,32,4) = 1;
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int VECT_VAR(expected_cumulative_sat_sh2,int,64,2) = 1;
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/* Expected results with shift by 2. */
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VECT_VAR_DECL(expected_sh2,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff };
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VECT_VAR_DECL(expected_sh2,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
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VECT_VAR_DECL(expected_sh2,uint,32,2) [] = { 0xffffffff, 0xffffffff };
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VECT_VAR_DECL(expected_sh2,uint,64,1) [] = { 0xffffffffffffffff };
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VECT_VAR_DECL(expected_sh2,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff };
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VECT_VAR_DECL(expected_sh2,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff };
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VECT_VAR_DECL(expected_sh2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
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0xffffffff, 0xffffffff };
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VECT_VAR_DECL(expected_sh2,uint,64,2) [] = { 0xffffffffffffffff,
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0xffffffffffffffff };
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/* Expected values of cumulative_saturation flag. */
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int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
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int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
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int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
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int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
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int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
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int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
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int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
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int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
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/* Expected results. */
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VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 };
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VECT_VAR_DECL(expected,uint,16,4) [] = { 0x8, 0x8, 0x8, 0x8 };
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VECT_VAR_DECL(expected,uint,32,2) [] = { 0x18, 0x18 };
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VECT_VAR_DECL(expected,uint,64,1) [] = { 0x40 };
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VECT_VAR_DECL(expected,uint,8,16) [] = { 0xa0, 0xa0, 0xa0, 0xa0,
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0xa0, 0xa0, 0xa0, 0xa0,
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0xa0, 0xa0, 0xa0, 0xa0,
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0xa0, 0xa0, 0xa0, 0xa0 };
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VECT_VAR_DECL(expected,uint,16,8) [] = { 0x180, 0x180, 0x180, 0x180,
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0x180, 0x180, 0x180, 0x180 };
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VECT_VAR_DECL(expected,uint,32,4) [] = { 0x380, 0x380, 0x380, 0x380 };
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VECT_VAR_DECL(expected,uint,64,2) [] = { 0x800, 0x800 };
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#define INSN vqshlu
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#define TEST_MSG "VQSHLU_N/VQSHLUQ_N"
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#define FNNAME1(NAME) void exec_ ## NAME ## _n(void)
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#define FNNAME(NAME) FNNAME1(NAME)
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FNNAME (INSN)
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{
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/* Basic test: v2=vqshlu_n(v1,v), then store the result. */
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#define TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
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Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T3, W, N)); \
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VECT_VAR(vector_res, T3, W, N) = \
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INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
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V); \
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vst1##Q##_##T4##W(VECT_VAR(result, T3, W, N), \
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VECT_VAR(vector_res, T3, W, N)); \
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CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
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/* Two auxliary macros are necessary to expand INSN */
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#define TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
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TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
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#define TEST_VQSHLU_N(Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
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TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
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DECL_VARIABLE_ALL_VARIANTS(vector);
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DECL_VARIABLE_ALL_VARIANTS(vector_res);
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clean_results ();
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/* Fill input vector with negative values, to check saturation on
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limits. */
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VDUP(vector, , int, s, 8, 8, -1);
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VDUP(vector, , int, s, 16, 4, -2);
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VDUP(vector, , int, s, 32, 2, -3);
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VDUP(vector, , int, s, 64, 1, -4);
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VDUP(vector, q, int, s, 8, 16, -1);
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VDUP(vector, q, int, s, 16, 8, -2);
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VDUP(vector, q, int, s, 32, 4, -3);
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VDUP(vector, q, int, s, 64, 2, -4);
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/* Choose shift amount arbitrarily. */
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#define CMT " (negative input)"
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TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_neg, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_neg, CMT);
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CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg, CMT);
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/* Fill input vector with max value, to check saturation on
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limits. */
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VDUP(vector, , int, s, 8, 8, 0x7F);
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VDUP(vector, , int, s, 16, 4, 0x7FFF);
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VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
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VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
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VDUP(vector, q, int, s, 8, 16, 0x7F);
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VDUP(vector, q, int, s, 16, 8, 0x7FFF);
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VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
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VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFULL);
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/* shift by 1. */
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#undef CMT
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#define CMT " (shift by 1)"
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TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_sh1, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 1, expected_cumulative_sat_sh1, CMT);
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CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh1, CMT);
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CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh1, CMT);
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/* shift by 2 to force saturation. */
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#undef CMT
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#define CMT " (shift by 2)"
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TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 2, expected_cumulative_sat_sh2, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_sh2, CMT);
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CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh2, CMT);
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CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh2, CMT);
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/* Fill input vector with positive values, to check normal case. */
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VDUP(vector, , int, s, 8, 8, 1);
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VDUP(vector, , int, s, 16, 4, 2);
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VDUP(vector, , int, s, 32, 2, 3);
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VDUP(vector, , int, s, 64, 1, 4);
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VDUP(vector, q, int, s, 8, 16, 5);
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VDUP(vector, q, int, s, 16, 8, 6);
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VDUP(vector, q, int, s, 32, 4, 7);
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VDUP(vector, q, int, s, 64, 2, 8);
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/* Arbitrary shift amount. */
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#undef CMT
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#define CMT ""
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TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 3, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 4, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 5, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 6, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 7, expected_cumulative_sat, CMT);
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TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 8, expected_cumulative_sat, CMT);
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CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
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CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
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CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
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CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
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CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
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}
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int main (void)
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{
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exec_vqshlu_n ();
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return 0;
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}
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