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re PR target/16719 ([ColdFire] Illegal move of byte itno address register causes compiler to ICE)
PR middle-end/16719 PR middle-end/18421 * config/m68k/m68k.h (HARD_REGNO_MODE_OK): Disallow bytes in address registers. * config/m68k/m68k.c (hard_regno_mode_ok): Likewise. * config/m68k/m68k.md: Replace 's' with 'i' in 4th alternative of addsi3_5200. From-SVN: r101900
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@ -1,3 +1,13 @@
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2005-07-12 Peter Barada <peter@the-baradas.com>
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PR middle-end/16719
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PR middle-end/18421
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* config/m68k/m68k.h (HARD_REGNO_MODE_OK): Disallow bytes
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in address registers.
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* config/m68k/m68k.c (hard_regno_mode_ok): Likewise.
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* config/m68k/m68k.md: Replace 's' with 'i' in 4th
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alternative of addsi3_5200.
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2005-07-11 Ian Lance Taylor <ian@airs.com>
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* config/mips/mips.md (ffs<mode>2): Remove.
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@ -54,6 +54,7 @@ extern int valid_dbcc_comparison_p_2 (rtx, enum machine_mode);
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#endif /* RTX_CODE */
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extern bool m68k_regno_mode_ok (int, enum machine_mode);
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extern int flags_in_68881 (void);
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extern bool use_return_insn (void);
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extern void override_options (void);
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@ -3360,3 +3360,36 @@ m68k_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
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return 1;
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}
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/* Value is true if hard register REGNO can hold a value of machine-mode MODE.
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On the 68000, the cpu registers can hold any mode except bytes in address
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registers, but the 68881 registers can hold only SFmode or DFmode. */
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bool
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m68k_regno_mode_ok (int regno, enum machine_mode mode)
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{
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if (regno < 8)
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{
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/* Data Registers, can hold aggregate if fits in. */
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if (regno + GET_MODE_SIZE (mode) / 4 <= 8)
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return true;
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}
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else if (regno < 16)
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{
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/* Address Registers, can't hold bytes, can hold aggregate if
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fits in. */
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if (GET_MODE_SIZE (mode) == 1)
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return false;
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if (regno + GET_MODE_SIZE (mode) / 4 <= 16)
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return true;
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}
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else if (regno < 24)
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{
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/* FPU registers, hold float or complex float of long double or
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smaller. */
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if ((GET_MODE_CLASS (mode) == MODE_FLOAT
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|| GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT)
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&& GET_MODE_UNIT_SIZE (mode) <= 12)
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return true;
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}
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return false;
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}
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@ -260,15 +260,12 @@ Boston, MA 02110-1301, USA. */
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#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
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m68k_hard_regno_rename_ok (OLD_REG, NEW_REG)
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/* On the m68k, the cpu registers can hold any mode but the 68881 registers
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can hold only SFmode or DFmode. */
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/* Value is true if hard register REGNO can hold a value of machine-mode MODE.
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On the 68000, the cpu registers can hold any mode except bytes in
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address registers, the 68881 registers can hold only SFmode or DFmode. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) < 16 \
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&& !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE (MODE) / 4 > 8)) \
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|| ((REGNO) >= 16 && (REGNO) < 24 \
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&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
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|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
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&& GET_MODE_UNIT_SIZE (MODE) <= 12))
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m68k_regno_mode_ok ((REGNO), (MODE))
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#define MODES_TIEABLE_P(MODE1, MODE2) \
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(! TARGET_68881 \
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@ -1851,7 +1851,7 @@
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(define_insn "*addsi3_5200"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=m,?a,?a,r")
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(plus:SI (match_operand:SI 1 "general_operand" "%0,a,rJK,0")
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(match_operand:SI 2 "general_src_operand" "d,rJK,a,mrIKLs")))]
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(match_operand:SI 2 "general_src_operand" "d,rJK,a,mrIKLi")))]
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"TARGET_COLDFIRE"
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"* return output_addsi3 (operands);")
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