mirror of
git://gcc.gnu.org/git/gcc.git
synced 2025-02-23 06:29:14 +08:00
s390.md (DWH, dwh): New mode macros.
2011-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/s390.md (DWH, dwh): New mode macros. ("umulsidi3"): Extend to support "umulditi3" as well. From-SVN: r179647
This commit is contained in:
parent
10c1a3e722
commit
6e0d70c957
@ -1,3 +1,8 @@
|
||||
2011-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
||||
|
||||
* config/s390/s390.md (DWH, dwh): New mode macros.
|
||||
("umulsidi3"): Extend to support "umulditi3" as well.
|
||||
|
||||
2011-10-07 Uros Bizjak <ubizjak@gmail.com>
|
||||
H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
|
@ -367,6 +367,10 @@
|
||||
(define_mode_iterator DW [(TI "TARGET_ZARCH") (DI "!TARGET_ZARCH")])
|
||||
(define_mode_iterator W [(DI "TARGET_ZARCH") (SI "!TARGET_ZARCH")])
|
||||
|
||||
;; Used by the umul pattern to express modes having half the size.
|
||||
(define_mode_attr DWH [(TI "DI") (DI "SI")])
|
||||
(define_mode_attr dwh [(TI "di") (DI "si")])
|
||||
|
||||
;; This mode iterator allows the QI and HI patterns to be defined from
|
||||
;; the same template.
|
||||
(define_mode_iterator HQI [HI QI])
|
||||
@ -5456,21 +5460,22 @@
|
||||
(set_attr "cpu_facility" "*,*,z10")])
|
||||
|
||||
;
|
||||
; umulsidi3 instruction pattern(s).
|
||||
; umul instruction pattern(s).
|
||||
;
|
||||
|
||||
(define_insn "umulsidi3"
|
||||
[(set (match_operand:DI 0 "register_operand" "=d,d")
|
||||
(mult:DI (zero_extend:DI
|
||||
(match_operand:SI 1 "register_operand" "%0,0"))
|
||||
(zero_extend:DI
|
||||
(match_operand:SI 2 "nonimmediate_operand" "d,RT"))))]
|
||||
"!TARGET_ZARCH && TARGET_CPU_ZARCH"
|
||||
; mlr, ml, mlgr, mlg
|
||||
(define_insn "umul<dwh><mode>3"
|
||||
[(set (match_operand:DW 0 "register_operand" "=d, d")
|
||||
(mult:DW (zero_extend:DW
|
||||
(match_operand:<DWH> 1 "register_operand" "%0, 0"))
|
||||
(zero_extend:DW
|
||||
(match_operand:<DWH> 2 "nonimmediate_operand" " d,RT"))))]
|
||||
"TARGET_CPU_ZARCH"
|
||||
"@
|
||||
mlr\t%0,%2
|
||||
ml\t%0,%2"
|
||||
ml<tg>r\t%0,%2
|
||||
ml<tg>\t%0,%2"
|
||||
[(set_attr "op_type" "RRE,RXY")
|
||||
(set_attr "type" "imulsi")])
|
||||
(set_attr "type" "imul<dwh>")])
|
||||
|
||||
;
|
||||
; mul(tf|df|sf|td|dd)3 instruction pattern(s).
|
||||
|
Loading…
Reference in New Issue
Block a user