diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md index 108de1c0c59c..b7a03935bb2e 100644 --- a/gcc/config/nvptx/nvptx.md +++ b/gcc/config/nvptx/nvptx.md @@ -401,6 +401,32 @@ %.\\tst%A0.u%T0\\t%0, %1;" [(set_attr "subregs_ok" "true")]) +;; Sign-extensions of truncations + +(define_insn "*extend_trunc_2_qi" + [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R") + (sign_extend:HSDIM + (truncate:QI (match_operand:HSDIM 1 "nvptx_register_operand" "R"))))] + "" + "%.\\tcvt.s%T0.s8\\t%0, %1;" + [(set_attr "subregs_ok" "true")]) + +(define_insn "*extend_trunc_2_hi" + [(set (match_operand:SDIM 0 "nvptx_register_operand" "=R") + (sign_extend:SDIM + (truncate:HI (match_operand:SDIM 1 "nvptx_register_operand" "R"))))] + "" + "%.\\tcvt.s%T0.s16\\t%0, %1;" + [(set_attr "subregs_ok" "true")]) + +(define_insn "*extend_trunc_di2_si" + [(set (match_operand:DI 0 "nvptx_register_operand" "=R") + (sign_extend:DI + (truncate:SI (match_operand:DI 1 "nvptx_register_operand" "R"))))] + "" + "%.\\tcvt.s64.s32\\t%0, %1;" + [(set_attr "subregs_ok" "true")]) + ;; Integer arithmetic (define_insn "add3" diff --git a/gcc/testsuite/gcc.target/nvptx/exttrunc-2.c b/gcc/testsuite/gcc.target/nvptx/exttrunc-2.c new file mode 100644 index 000000000000..b108b5527646 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/exttrunc-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int exttrunc_si2_qi(int x) +{ + return (char)x; +} + +/* Match: + mov.u32 %r24, %ar0; + cvt.s32.s8 %value, %r24; */ + +/* { dg-final { scan-assembler-times "mov\.u32\t%r\[0-9\]*, %ar0" 1 } } */ +/* { dg-final { scan-assembler-times "mov\." 1 } } */ + +/* { dg-final { scan-assembler-times "cvt\.s32\.s8" 1 } } */ +/* { dg-final { scan-assembler-times "cvt\." 1 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/exttrunc-3.c b/gcc/testsuite/gcc.target/nvptx/exttrunc-3.c new file mode 100644 index 000000000000..69e42fa4f60a --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/exttrunc-3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long exttrunc_di2_qi(long x) +{ + return (char)x; +} + +/* Match: + mov.u64 %r24, %ar0; + cvt.s64.s8 %value, %r24; */ + +/* { dg-final { scan-assembler-times "mov\.u64\t%r\[0-9\]*, %ar0" 1 } } */ +/* { dg-final { scan-assembler-times "mov\." 1 } } */ + +/* { dg-final { scan-assembler-times "cvt\.s64\.s8" 1 } } */ +/* { dg-final { scan-assembler-times "cvt\." 1 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/exttrunc-4.c b/gcc/testsuite/gcc.target/nvptx/exttrunc-4.c new file mode 100644 index 000000000000..09009db73133 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/exttrunc-4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int exttrunc_si2_hi(int x) +{ + return (short)x; +} + +/* Match: + mov.u32 %r24, %ar0; + cvt.s32.s16 %value, %r24; + +/* { dg-final { scan-assembler-times "mov\.u32\t%r\[0-9\]*, %ar0" 1 } } */ +/* { dg-final { scan-assembler-times "mov\." 1 } } */ + +/* { dg-final { scan-assembler-times "cvt\.s32\.s16" 1 } } */ +/* { dg-final { scan-assembler-times "cvt\." 1 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/exttrunc-5.c b/gcc/testsuite/gcc.target/nvptx/exttrunc-5.c new file mode 100644 index 000000000000..5445850fa93b --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/exttrunc-5.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long exttrunc_di2_hi(long x) +{ + return (short)x; +} + +/* Match: + mov.u64 %r24, %ar0; + cvt.s64.s16 %value, %r24; */ + +/* { dg-final { scan-assembler-times "mov\.u64\t%r\[0-9\]*, %ar0" 1 } } */ +/* { dg-final { scan-assembler-times "mov\." 1 } } */ + +/* { dg-final { scan-assembler-times "cvt\.s64\.s16" 1 } } */ +/* { dg-final { scan-assembler-times "cvt\." 1 } } */ diff --git a/gcc/testsuite/gcc.target/nvptx/exttrunc-6.c b/gcc/testsuite/gcc.target/nvptx/exttrunc-6.c new file mode 100644 index 000000000000..74f050fa2b9e --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/exttrunc-6.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long exttrunc_di2_si(long x) +{ + return (int)x; +} + +/* Match: + mov.u64 %r24, %ar0; + cvt.s64.s32 %value, %r24; */ + +/* { dg-final { scan-assembler-times "mov\.u64\t%r\[0-9\]*, %ar0" 1 } } */ +/* { dg-final { scan-assembler-times "mov\." 1 } } */ + +/* { dg-final { scan-assembler-times "cvt\.s64\.s32" 1 } } */ +/* { dg-final { scan-assembler-times "cvt\." 1 } } */