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[AArch64] Rename UNSPEC_WHILE* to match instruction mnemonics
The UNSPEC_WHILE*s had an underscore before the condition code, whereas almost all other SVE unspecs are taken directly from the mnemonic. 2020-01-09 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to... (UNSPEC_WHILELE): ...this. (UNSPEC_WHILE_LO): Rename to... (UNSPEC_WHILELO): ...this. (UNSPEC_WHILE_LS): Rename to... (UNSPEC_WHILELS): ...this. (UNSPEC_WHILE_LT): Rename to... (UNSPEC_WHILELT): ...this. * config/aarch64/iterators.md (SVE_WHILE): Update accordingly. (cmp_op, while_optab_cmp): Likewise. * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise. * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise. (svwhilelt): Likewise. From-SVN: r280053
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@ -1,3 +1,19 @@
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2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
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(UNSPEC_WHILELE): ...this.
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(UNSPEC_WHILE_LO): Rename to...
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(UNSPEC_WHILELO): ...this.
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(UNSPEC_WHILE_LS): Rename to...
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(UNSPEC_WHILELS): ...this.
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(UNSPEC_WHILE_LT): Rename to...
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(UNSPEC_WHILELT): ...this.
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* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
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(cmp_op, while_optab_cmp): Likewise.
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* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
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* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
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(svwhilelt): Likewise.
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2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
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@ -2666,8 +2666,8 @@ FUNCTION (svunpkhi, svunpk_impl, (true))
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FUNCTION (svunpklo, svunpk_impl, (false))
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FUNCTION (svuzp1, svuzp_impl, (0))
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FUNCTION (svuzp2, svuzp_impl, (1))
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FUNCTION (svwhilele, svwhile_impl, (UNSPEC_WHILE_LE, UNSPEC_WHILE_LS, true))
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FUNCTION (svwhilelt, svwhile_impl, (UNSPEC_WHILE_LT, UNSPEC_WHILE_LO, false))
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FUNCTION (svwhilele, svwhile_impl, (UNSPEC_WHILELE, UNSPEC_WHILELS, true))
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FUNCTION (svwhilelt, svwhile_impl, (UNSPEC_WHILELT, UNSPEC_WHILELO, false))
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FUNCTION (svwrffr, svwrffr_impl,)
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FUNCTION (svzip1, svzip_impl, (0))
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FUNCTION (svzip2, svzip_impl, (1))
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@ -4272,7 +4272,7 @@ aarch64_sve_move_pred_via_while (rtx target, machine_mode mode,
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{
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rtx limit = force_reg (DImode, gen_int_mode (vl, DImode));
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target = aarch64_target_reg (target, mode);
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emit_insn (gen_while (UNSPEC_WHILE_LO, DImode, mode,
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emit_insn (gen_while (UNSPEC_WHILELO, DImode, mode,
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target, const0_rtx, limit));
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return target;
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}
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@ -241,10 +241,10 @@
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UNSPEC_UNPACKSLO
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UNSPEC_UNPACKULO
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UNSPEC_PACK
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UNSPEC_WHILE_LE
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UNSPEC_WHILE_LO
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UNSPEC_WHILE_LS
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UNSPEC_WHILE_LT
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UNSPEC_WHILELE
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UNSPEC_WHILELO
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UNSPEC_WHILELS
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UNSPEC_WHILELT
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UNSPEC_WHILERW
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UNSPEC_WHILEWR
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UNSPEC_LDN
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@ -2082,8 +2082,8 @@
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(define_int_iterator SVE_CFP_TERNARY_LANE [UNSPEC_FCMLA UNSPEC_FCMLA90
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UNSPEC_FCMLA180 UNSPEC_FCMLA270])
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(define_int_iterator SVE_WHILE [UNSPEC_WHILE_LE UNSPEC_WHILE_LO
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UNSPEC_WHILE_LS UNSPEC_WHILE_LT])
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(define_int_iterator SVE_WHILE [UNSPEC_WHILELE UNSPEC_WHILELO
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UNSPEC_WHILELS UNSPEC_WHILELT])
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(define_int_iterator SVE2_WHILE_PTR [UNSPEC_WHILERW UNSPEC_WHILEWR])
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@ -2486,17 +2486,17 @@
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(UNSPEC_COND_FCMLE "le")
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(UNSPEC_COND_FCMLT "lt")
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(UNSPEC_COND_FCMNE "ne")
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(UNSPEC_WHILE_LE "le")
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(UNSPEC_WHILE_LO "lo")
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(UNSPEC_WHILE_LS "ls")
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(UNSPEC_WHILE_LT "lt")
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(UNSPEC_WHILELE "le")
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(UNSPEC_WHILELO "lo")
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(UNSPEC_WHILELS "ls")
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(UNSPEC_WHILELT "lt")
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(UNSPEC_WHILERW "rw")
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(UNSPEC_WHILEWR "wr")])
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(define_int_attr while_optab_cmp [(UNSPEC_WHILE_LE "le")
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(UNSPEC_WHILE_LO "ult")
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(UNSPEC_WHILE_LS "ule")
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(UNSPEC_WHILE_LT "lt")])
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(define_int_attr while_optab_cmp [(UNSPEC_WHILELE "le")
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(UNSPEC_WHILELO "ult")
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(UNSPEC_WHILELS "ule")
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(UNSPEC_WHILELT "lt")])
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(define_int_attr raw_war [(UNSPEC_WHILERW "raw")
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(UNSPEC_WHILEWR "war")])
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