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[AArch64] Relax CANNOT_CHANGE_MODE_CLASS

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gcc/
	* config/aarch64/aarch64-protos.h
	(aarch64_cannot_change_mode_class_ptr): Declare.
	* config/aarch64/aarch64.c (aarch64_cannot_change_mode_class,
	aarch64_cannot_change_mode_class_ptr): New.
	* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Change to call
	backend hook aarch64_cannot_change_mode_class.

From-SVN: r206804
This commit is contained in:
Tejas Belagod 2014-01-20 12:34:13 +00:00 committed by Tejas Belagod
parent ffee7aa91a
commit 69675d50f6
4 changed files with 49 additions and 6 deletions

9
gcc/ChangeLog

@ -1,3 +1,12 @@
2014-01-20 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64-protos.h
(aarch64_cannot_change_mode_class_ptr): Declare.
* config/aarch64/aarch64.c (aarch64_cannot_change_mode_class,
aarch64_cannot_change_mode_class_ptr): New.
* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Change to call
backend hook aarch64_cannot_change_mode_class.
2014-01-20 James Greenhalgh <james.greenhalgh@arm.com>
* common/config/aarch64/aarch64-common.c

3
gcc/config/aarch64/aarch64-protos.h

@ -161,6 +161,9 @@ struct tune_params
HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode);
bool aarch64_cannot_change_mode_class (enum machine_mode,
enum machine_mode,
enum reg_class);
enum aarch64_symbol_type
aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context);
bool aarch64_constant_address_p (rtx);

36
gcc/config/aarch64/aarch64.c

@ -8259,6 +8259,42 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
return ret;
}
/* Implement target hook CANNOT_CHANGE_MODE_CLASS. */
bool
aarch64_cannot_change_mode_class (enum machine_mode from,
enum machine_mode to,
enum reg_class rclass)
{
/* Full-reg subregs are allowed on general regs or any class if they are
the same size. */
if (GET_MODE_SIZE (from) == GET_MODE_SIZE (to)
|| !reg_classes_intersect_p (FP_REGS, rclass))
return false;
/* Limited combinations of subregs are safe on FPREGs. Particularly,
1. Vector Mode to Scalar mode where 1 unit of the vector is accessed.
2. Scalar to Scalar for integer modes or same size float modes.
3. Vector to Vector modes. */
if (GET_MODE_SIZE (from) > GET_MODE_SIZE (to))
{
if (aarch64_vector_mode_supported_p (from)
&& GET_MODE_SIZE (GET_MODE_INNER (from)) == GET_MODE_SIZE (to))
return false;
if (GET_MODE_NUNITS (from) == 1
&& GET_MODE_NUNITS (to) == 1
&& (GET_MODE_CLASS (from) == MODE_INT
|| from == to))
return false;
if (aarch64_vector_mode_supported_p (from)
&& aarch64_vector_mode_supported_p (to))
return false;
}
return true;
}
#undef TARGET_ADDRESS_COST
#define TARGET_ADDRESS_COST aarch64_address_cost

7
gcc/config/aarch64/aarch64.h

@ -822,13 +822,8 @@ do { \
extern void __aarch64_sync_cache_range (void *, void *); \
__aarch64_sync_cache_range (beg, end)
/* VFP registers may only be accessed in the mode they
were set. */
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
? reg_classes_intersect_p (FP_REGS, (CLASS)) \
: 0)
aarch64_cannot_change_mode_class (FROM, TO, CLASS)
#define SHIFT_COUNT_TRUNCATED !TARGET_SIMD