RISC-V: Add newline to the end of file [NFC]

gcc/ChangeLog:

	* config/riscv/riscv-c.cc: Add newline to the end of file.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pragma-1.c: Add newline to the end of file.
	* gcc.target/riscv/rvv/base/pragma-2.c: Ditto.
	* gcc.target/riscv/rvv/base/pragma-3.c: Ditto.
	* gcc.target/riscv/rvv/base/user-1.c: Ditto.
	* gcc.target/riscv/rvv/base/user-2.c: Ditto.
	* gcc.target/riscv/rvv/base/user-3.c: Ditto.
	* gcc.target/riscv/rvv/base/user-4.c: Ditto.
	* gcc.target/riscv/rvv/base/user-5.c: Ditto.
	* gcc.target/riscv/rvv/base/user-6.c: Ditto.
	* gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
	* gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
This commit is contained in:
Kito Cheng 2022-10-10 21:05:50 +08:00
parent 80cb09d4f7
commit 684d238b8c
12 changed files with 12 additions and 12 deletions

View File

@ -190,4 +190,4 @@ void
riscv_register_pragmas (void)
{
c_register_pragma ("riscv", "intrinsic", riscv_pragma_intrinsic);
}
}

View File

@ -1,4 +1,4 @@
/* { dg-do compile } */
/* { dg-options "-O3 -march=rv32gc -mabi=ilp32d" } */
#pragma riscv intrinsic "vector" /* { dg-error {#pragma riscv intrinsic' option 'vector' needs 'V' extension enabled} } */
#pragma riscv intrinsic "vector" /* { dg-error {#pragma riscv intrinsic' option 'vector' needs 'V' extension enabled} } */

View File

@ -1,4 +1,4 @@
/* { dg-do compile } */
/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
#pragma riscv intrinsic "vector"
#pragma riscv intrinsic "vector"

View File

@ -1,4 +1,4 @@
/* { dg-do compile } */
/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
#pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */
#pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;}
void foo62 () {vfloat64m1_t t;}
void foo63 () {vfloat64m2_t t;}
void foo64 () {vfloat64m4_t t;}
void foo65 () {vfloat64m8_t t;}
void foo65 () {vfloat64m8_t t;}

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;} /* { dg-error {unknown type name 'vfloat32m8_t'}
void foo62 () {vfloat64m1_t t;} /* { dg-error {unknown type name 'vfloat64m1_t'} } */
void foo63 () {vfloat64m2_t t;} /* { dg-error {unknown type name 'vfloat64m2_t'} } */
void foo64 () {vfloat64m4_t t;} /* { dg-error {unknown type name 'vfloat64m4_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;}
void foo62 () {vfloat64m1_t t;} /* { dg-error {unknown type name 'vfloat64m1_t'} } */
void foo63 () {vfloat64m2_t t;} /* { dg-error {unknown type name 'vfloat64m2_t'} } */
void foo64 () {vfloat64m4_t t;} /* { dg-error {unknown type name 'vfloat64m4_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;}
void foo62 () {vfloat64m1_t t;}
void foo63 () {vfloat64m2_t t;}
void foo64 () {vfloat64m4_t t;}
void foo65 () {vfloat64m8_t t;}
void foo65 () {vfloat64m8_t t;}

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;} /* { dg-error {unknown type name 'vfloat32m8_t'}
void foo62 () {vfloat64m1_t t;} /* { dg-error {unknown type name 'vfloat64m1_t'} } */
void foo63 () {vfloat64m2_t t;} /* { dg-error {unknown type name 'vfloat64m2_t'} } */
void foo64 () {vfloat64m4_t t;} /* { dg-error {unknown type name 'vfloat64m4_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */

View File

@ -62,4 +62,4 @@ void foo61 () {vfloat32m8_t t;}
void foo62 () {vfloat64m1_t t;} /* { dg-error {unknown type name 'vfloat64m1_t'} } */
void foo63 () {vfloat64m2_t t;} /* { dg-error {unknown type name 'vfloat64m2_t'} } */
void foo64 () {vfloat64m4_t t;} /* { dg-error {unknown type name 'vfloat64m4_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */
void foo65 () {vfloat64m8_t t;} /* { dg-error {unknown type name 'vfloat64m8_t'} } */

View File

@ -23,4 +23,4 @@ unsigned long vread_csr_vcsr(void) {
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vstart} 1 } } */
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vxsat} 1 } } */
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vxrm} 1 } } */
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vcsr} 1 } } */
/* { dg-final { scan-assembler-times {csrr\s+(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7]),\s*vcsr} 1 } } */

View File

@ -23,4 +23,4 @@ void vwrite_csr_vcsr(unsigned long value) {
/* { dg-final { scan-assembler-times {csrw\s+vstart,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
/* { dg-final { scan-assembler-times {csrw\s+vxsat,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
/* { dg-final { scan-assembler-times {csrw\s+vxrm,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
/* { dg-final { scan-assembler-times {csrw\s+vcsr,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */
/* { dg-final { scan-assembler-times {csrw\s+vcsr,\s*(?:ra|[sgtf]p|t[0-6]|s[0-9]|s10|s11|a[0-7])} 1 } } */