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arm: Various MVE vec_duplicate fixes [PR99647]

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This patch fixes various issues with vec_duplicate in the MVE patterns.
Currently there are two patterns named *mve_mov<mode>. The second of
these is really a vector duplicate rather than a move, so I've renamed
it accordingly.

As it stands, there are several issues with this pattern:
1. The MVE_types iterator has an entry for TImode, but
   vec_duplicate:TI is invalid.
2. The mode of the operand to vec_duplicate is SImode, but it should
   vary according to the vector mode iterator.
3. The second alternative of this pattern is bogus: it allows matching
   symbol_refs (the cause of the PR) and const_ints (which means that it
   matches (vec_duplicate (const_int ...)) which is non-canonical: such
   rtxes should be const_vectors instead and handled by the main vector
   move pattern).

This patch fixes all of these issues, and removes the redundant
*mve_vec_duplicate<mode> pattern.

gcc/ChangeLog:

	PR target/99647
	* config/arm/iterators.md (MVE_vecs): New.
	(V_elem): Also handle V2DF.
	* config/arm/mve.md (*mve_mov<mode>): Rename to ...
	(*mve_vdup<mode>): ... this. Remove second alternative since
	vec_duplicate of const_int is not canonical RTL, and we don't
	want to match symbol_refs.
	(*mve_vec_duplicate<mode>): Delete (pattern is redundant).

gcc/testsuite/ChangeLog:

	PR target/99647
	* gcc.c-torture/compile/pr99647.c: New test.
This commit is contained in:
Alex Coplan 2021-04-08 09:36:57 +01:00
parent 0fb21ba799
commit 67d56b2720
3 changed files with 17 additions and 21 deletions
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8
gcc/config/arm/iterators.md
View File

@ -261,6 +261,7 @@
;; MVE mode iterator.
(define_mode_iterator MVE_types [V16QI V8HI V4SI V2DI TI V8HF V4SF V2DF])
(define_mode_iterator MVE_vecs [V16QI V8HI V4SI V2DI V8HF V4SF V2DF])
(define_mode_iterator MVE_VLD_ST [V16QI V8HI V4SI V8HF V4SF])
(define_mode_iterator MVE_0 [V8HF V4SF])
(define_mode_iterator MVE_1 [V16QI V8HI V4SI V2DI])
@ -567,9 +568,10 @@
(V4HI "HI") (V8HI "HI")
(V4HF "HF") (V8HF "HF")
(V4BF "BF") (V8BF "BF")
(V2SI "SI") (V4SI "SI")
(V2SF "SF") (V4SF "SF")
(DI "DI") (V2DI "DI")])
(V2SI "SI") (V4SI "SI")
(V2SF "SF") (V4SF "SF")
(DI "DI") (V2DI "DI")
(V2DF "DF")])
;; As above but in lower case.
(define_mode_attr V_elem_l [(V8QI "qi") (V16QI "qi")

25
gcc/config/arm/mve.md
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@ -104,18 +104,14 @@
(set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*,*")
(set_attr "neg_pool_range" "*,*,*,*,996,*,*,*,*")])
(define_insn "*mve_mov<mode>"
[(set (match_operand:MVE_types 0 "s_register_operand" "=w,w")
(vec_duplicate:MVE_types
(match_operand:SI 1 "nonmemory_operand" "r,i")))]
(define_insn "*mve_vdup<mode>"
[(set (match_operand:MVE_vecs 0 "s_register_operand" "=w")
(vec_duplicate:MVE_vecs
(match_operand:<V_elem> 1 "s_register_operand" "r")))]
"TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
{
if (which_alternative == 0)
return "vdup.<V_sz_elem>\t%q0, %1";
return "vmov.<V_sz_elem>\t%q0, %1";
}
[(set_attr "length" "4,4")
(set_attr "type" "mve_move,mve_move")])
"vdup.<V_sz_elem>\t%q0, %1"
[(set_attr "length" "4")
(set_attr "type" "mve_move")])
;;
;; [vst4q])
@ -10737,13 +10733,6 @@
[(set_attr "type" "mve_move")
(set_attr "length" "8")])
(define_insn "*mve_vec_duplicate<mode>"
[(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w")
(vec_duplicate:MVE_VLD_ST (match_operand:<V_elem> 1 "general_operand" "r")))]
"TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
"vdup.<V_sz_elem>\t%q0, %1"
[(set_attr "type" "mve_move")])
;; CDE instructions on MVE registers.
(define_insn "arm_vcx1qv16qi"

5
gcc/testsuite/gcc.c-torture/compile/pr99647.c Normal file
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@ -0,0 +1,5 @@
/* { dg-do assemble } */
typedef int __attribute((vector_size(16))) V;
V f(void) {
return (V){ (int)f, (int)f, (int)f, (int)f };
}