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m68hc11.md ("mulqi3"): Allow address register to avoid reload problems; define split for it.

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* config/m68hc11/m68hc11.md ("mulqi3"): Allow address register to
	avoid reload problems; define split for it.

From-SVN: r63680
This commit is contained in:
Stephane Carrez 2003-03-02 21:19:20 +01:00 committed by Stephane Carrez
parent 68dfecb392
commit 65fb64fe95
2 changed files with 33 additions and 3 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2003-03-02 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11.md ("mulqi3"): Allow address register to
avoid reload problems; define split for it.
2003-03-02 Stephane Carrez <stcarrez@nerim.fr>
* config/m68hc11/m68hc11.c (m68hc11_shift_operator): New function.

31
gcc/config/m68hc11/m68hc11.md
View File

@ -2894,12 +2894,15 @@
}")
(define_insn "mulqi3"
[(set (match_operand:QI 0 "register_operand" "=d")
(mult:QI (match_operand:QI 1 "nonimmediate_operand" "dum")
(match_operand:QI 2 "nonimmediate_operand" "dum")))]
[(set (match_operand:QI 0 "register_operand" "=d,*x,*y")
(mult:QI (match_operand:QI 1 "nonimmediate_operand" "%dum,0,0")
(match_operand:QI 2 "general_operand" "dium,*xium,*yium")))]
""
"*
{
if (A_REG_P (operands[0]))
return \"#\";
if (D_REG_P (operands[1]) && D_REG_P (operands[2]))
{
output_asm_insn (\"tba\", operands);
@ -2925,6 +2928,28 @@
return \"mul\";
}")
(define_split
[(set (match_operand:QI 0 "hard_addr_reg_operand" "")
(mult:QI (match_operand:QI 1 "general_operand" "")
(match_operand:QI 2 "general_operand" "")))]
"z_replacement_completed == 2"
[(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])
(set (reg:QI D_REGNUM) (mult:QI (match_dup 5) (match_dup 6)))
(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])]
"
operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
if (A_REG_P (operands[1]))
operands[5] = gen_rtx (REG, QImode, HARD_D_REGNUM);
else
operands[5] = operands[1];
if (A_REG_P (operands[2]))
operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
else
operands[6] = operands[2];
")
(define_insn "mulqihi3"
[(set (match_operand:HI 0 "register_operand" "=d,d")
(mult:HI (sign_extend:HI