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byte-in-either-range-0.c: New test.
gcc/testsuite/ChangeLog: 2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/byte-in-either-range-0.c: New test. * gcc.target/powerpc/byte-in-either-range-1.c: New test. * gcc.target/powerpc/byte-in-range-0.c: New test. * gcc.target/powerpc/byte-in-range-1.c: New test. * gcc.target/powerpc/byte-in-set-0.c: New test. * gcc.target/powerpc/byte-in-set-1.c: New test. * gcc.target/powerpc/byte-in-set-2.c: New test. gcc/ChangeLog: 2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.md (UNSPEC_CMPRB): New unspec value. (UNSPEC_CMPRB2): New unspec value. (UNSPEC_CMPEQB): New unspec value. (cmprb): New expansion. (*cmprb_internal): New insn. (*setb_internal): New insn. (cmprb2): New expansion. (*cmprb2_internal): New insn. (cmpeqb): New expansion. (*cmpeqb_internal): New insn. * config/rs6000/rs6000-builtin.def (BU_P9_2): New macro. (BU_P9_64BIT_2): Likewise. (BU_P9_OVERLOAD_2): Likewise. (CMPRB): Add byte-in-range built-in function. (CMBRB2): Add byte-in-either-range built-in function. (CMPEQB): Add byte-in-set built-in function. (CMPRB): Add overload support for byte-in-range function. (CMPRB2): Add overload support for byte-in-either-range function. (CMPEQB): Add overload support for byte-in-set built-in function. * config/rs6000/rs6000-c.c (P9_BUILTIN_CMPRB): Macro expansion to define argument types for new builtin. (P9_BUILTIN_CMPRB2): Likewise. (P9_BUILTIN_CMPEQB): Likewise. * doc/extend.texi (PowerPC AltiVec Built-in Functions): Rearrange the order of presentation for certain built-in functions (scalar_extract_exp, scalar_extract_sig, scalar_insert_exp) (scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq) (scalar_cmp_exp_unordered, scalar_test_data_class) (scalar_test_neg) to improve locality and flow. Document the new __builtin_scalar_byte_in_set, __builtin_scalar_byte_in_range, and __builtin_scalar_byte_in_either_range functions. From-SVN: r243770
This commit is contained in:
Kelvin Nilsen
parent
68dde2bfdd
commit
6040f6d497
@ -1,3 +1,38 @@
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2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* config/rs6000/altivec.md (UNSPEC_CMPRB): New unspec value.
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(UNSPEC_CMPRB2): New unspec value.
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(UNSPEC_CMPEQB): New unspec value.
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(cmprb): New expansion.
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(*cmprb_internal): New insn.
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(*setb_internal): New insn.
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(cmprb2): New expansion.
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(*cmprb2_internal): New insn.
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(cmpeqb): New expansion.
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(*cmpeqb_internal): New insn.
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* config/rs6000/rs6000-builtin.def (BU_P9_2): New macro.
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(BU_P9_64BIT_2): Likewise.
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(BU_P9_OVERLOAD_2): Likewise.
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(CMPRB): Add byte-in-range built-in function.
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(CMBRB2): Add byte-in-either-range built-in function.
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(CMPEQB): Add byte-in-set built-in function.
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(CMPRB): Add overload support for byte-in-range function.
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(CMPRB2): Add overload support for byte-in-either-range function.
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(CMPEQB): Add overload support for byte-in-set built-in function.
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* config/rs6000/rs6000-c.c (P9_BUILTIN_CMPRB): Macro expansion to
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define argument types for new builtin.
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(P9_BUILTIN_CMPRB2): Likewise.
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(P9_BUILTIN_CMPEQB): Likewise.
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* doc/extend.texi (PowerPC AltiVec Built-in Functions): Rearrange
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the order of presentation for certain built-in functions
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(scalar_extract_exp, scalar_extract_sig, scalar_insert_exp)
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(scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq)
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(scalar_cmp_exp_unordered, scalar_test_data_class)
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(scalar_test_neg) to improve locality and flow. Document
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the new __builtin_scalar_byte_in_set,
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__builtin_scalar_byte_in_range, and
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__builtin_scalar_byte_in_either_range functions.
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2016-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64.md: New define_split above bswap<mode>2.
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@ -153,6 +153,9 @@
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UNSPEC_BCDADD
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UNSPEC_BCDSUB
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UNSPEC_BCD_OVERFLOW
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UNSPEC_CMPRB
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UNSPEC_CMPRB2
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UNSPEC_CMPEQB
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])
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(define_c_enum "unspecv"
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@ -3707,6 +3710,189 @@
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"darn %0,1"
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[(set_attr "type" "integer")])
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;; Test byte within range.
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;;
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the range specified by operand 2.
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;; The bytes of operand 2 are organized as xx:xx:hi:lo.
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;;
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;; Return in target register operand 0 a value of 1 if lo <= vv and
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;; vv <= hi. Otherwise, set register operand 0 to 0.
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;;
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;; Though the instructions to which this expansion maps operate on
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;; 64-bit registers, the current implementation only operates on
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;; SI-mode operands as the high-order bits provide no information
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;; that is not already available in the low-order bits. To avoid the
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;; costs of data widening operations, future enhancements might allow
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;; DI mode for operand 0 and/or might allow operand 1 to be QI mode.
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(define_expand "cmprb"
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[(set (match_dup 3)
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:SI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPRB))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(if_then_else:SI (lt (match_dup 3)
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(const_int 0))
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(const_int -1)
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(if_then_else (gt (match_dup 3)
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(const_int 0))
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(const_int 1)
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(const_int 0))))]
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"TARGET_P9_MISC"
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{
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operands[3] = gen_reg_rtx (CCmode);
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})
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the range specified by operand 2.
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;; The bytes of operand 2 are organized as xx:xx:hi:lo.
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;;
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;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if
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;; lo <= vv and vv <= hi. Otherwise, set the GT bit to 0. The other
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;; 3 bits of the target CR register are all set to 0.
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(define_insn "*cmprb_internal"
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[(set (match_operand:CC 0 "cc_reg_operand" "=y")
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:SI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPRB))]
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"TARGET_P9_MISC"
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"cmprb %0,0,%1,%2"
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[(set_attr "type" "logical")])
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;; Set operand 0 register to -1 if the LT bit (0x8) of condition
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;; register operand 1 is on. Otherwise, set operand 0 register to 1
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;; if the GT bit (0x4) of condition register operand 1 is on.
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;; Otherwise, set operand 0 to 0. Note that the result stored into
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;; register operand 0 is non-zero iff either the LT or GT bits are on
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;; within condition register operand 1.
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(define_insn "*setb_internal"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y")
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(const_int 0))
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(const_int -1)
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(if_then_else (gt (match_dup 1)
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(const_int 0))
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(const_int 1)
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(const_int 0))))]
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"TARGET_P9_MISC"
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"setb %0,%1"
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[(set_attr "type" "logical")])
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;; Test byte within two ranges.
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;;
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the range specified by operand 2.
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;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2.
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;;
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;; Return in target register operand 0 a value of 1 if (lo_1 <= vv and
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;; vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2). Otherwise, set register
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;; operand 0 to 0.
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;;
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;; Though the instructions to which this expansion maps operate on
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;; 64-bit registers, the current implementation only operates on
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;; SI-mode operands as the high-order bits provide no information
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;; that is not already available in the low-order bits. To avoid the
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;; costs of data widening operations, future enhancements might allow
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;; DI mode for operand 0 and/or might allow operand 1 to be QI mode.
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(define_expand "cmprb2"
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[(set (match_dup 3)
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:SI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPRB2))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(if_then_else:SI (lt (match_dup 3)
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(const_int 0))
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(const_int -1)
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(if_then_else (gt (match_dup 3)
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(const_int 0))
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(const_int 1)
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(const_int 0))))]
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"TARGET_P9_MISC"
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{
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operands[3] = gen_reg_rtx (CCmode);
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})
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the ranges specified by operand 2.
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;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2.
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;;
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;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if
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;; (lo_1 <= vv and vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2).
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;; Otherwise, set the GT bit to 0. The other 3 bits of the target
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;; CR register are all set to 0.
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(define_insn "*cmprb2_internal"
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[(set (match_operand:CC 0 "cc_reg_operand" "=y")
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:SI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPRB2))]
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"TARGET_P9_MISC"
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"cmprb %0,1,%1,%2"
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[(set_attr "type" "logical")])
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;; Test byte membership within set of 8 bytes.
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;;
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the set specified by operand 2.
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;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7.
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;;
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;; Return in target register operand 0 a value of 1 if vv equals one
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;; of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise, set
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;; register operand 0 to 0. Note that the 8 byte values held within
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;; operand 2 need not be unique.
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;;
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;; Though the instructions to which this expansion maps operate on
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;; 64-bit registers, the current implementation requires that operands
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;; 0 and 1 have mode SI as the high-order bits provide no information
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;; that is not already available in the low-order bits. To avoid the
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;; costs of data widening operations, future enhancements might allow
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;; DI mode for operand 0 and/or might allow operand 1 to be QI mode.
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(define_expand "cmpeqb"
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[(set (match_dup 3)
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:DI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPEQB))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(if_then_else:SI (lt (match_dup 3)
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(const_int 0))
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(const_int -1)
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(if_then_else (gt (match_dup 3)
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(const_int 0))
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(const_int 1)
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(const_int 0))))]
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"TARGET_P9_MISC && TARGET_64BIT"
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{
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operands[3] = gen_reg_rtx (CCmode);
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})
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;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx
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;; represents a byte whose value is ignored in this context and
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;; vv, the least significant byte, holds the byte value that is to
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;; be tested for membership within the set specified by operand 2.
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;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7.
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;;
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;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if vv
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;; equals one of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise,
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;; set the GT bit to zero. The other 3 bits of the target CR register
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;; are all set to 0.
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(define_insn "*cmpeqb_internal"
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[(set (match_operand:CC 0 "cc_reg_operand" "=y")
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(unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
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(match_operand:DI 2 "gpc_reg_operand" "r")]
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UNSPEC_CMPEQB))]
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"TARGET_P9_MISC && TARGET_64BIT"
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"cmpeqb %0,%1,%2"
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[(set_attr "type" "logical")])
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(define_expand "bcd<bcd_add_sub>_<code>"
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[(parallel [(set (reg:CCFP CR6_REGNO)
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(compare:CCFP
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@ -898,6 +898,23 @@
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| RS6000_BTC_PREDICATE), \
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CODE_FOR_nothing) /* ICODE */
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#define BU_P9_2(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM, /* ENUM */ \
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"__builtin_scalar_" NAME, /* NAME */ \
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RS6000_BTM_P9_VECTOR, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_BINARY), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#define BU_P9_64BIT_2(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM, /* ENUM */ \
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"__builtin_scalar_" NAME, /* NAME */ \
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RS6000_BTM_P9_VECTOR \
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| RS6000_BTM_64BIT, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_BINARY), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#define BU_P9V_OVERLOAD_1(ENUM, NAME) \
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RS6000_BUILTIN_1 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
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"__builtin_vec_" NAME, /* NAME */ \
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@ -921,6 +938,15 @@
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(RS6000_BTC_OVERLOADED /* ATTR */ \
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| RS6000_BTC_TERNARY), \
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CODE_FOR_nothing) /* ICODE */
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#define BU_P9_OVERLOAD_2(ENUM, NAME) \
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RS6000_BUILTIN_2 (P9_BUILTIN_ ## ENUM, /* ENUM */ \
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"__builtin_" NAME, /* NAME */ \
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RS6000_BTM_P9_VECTOR, /* MASK */ \
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(RS6000_BTC_OVERLOADED /* ATTR */ \
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| RS6000_BTC_BINARY), \
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CODE_FOR_nothing) /* ICODE */
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#endif
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@ -2152,6 +2178,16 @@ BU_P9V_OVERLOAD_1 (VPRTYBD, "vprtybd")
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BU_P9V_OVERLOAD_1 (VPRTYBQ, "vprtybq")
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BU_P9V_OVERLOAD_1 (VPRTYBW, "vprtybw")
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/* 2 argument functions added in ISA 3.0 (power9). */
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BU_P9_2 (CMPRB, "byte_in_range", CONST, cmprb)
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BU_P9_2 (CMPRB2, "byte_in_either_range", CONST, cmprb2)
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BU_P9_64BIT_2 (CMPEQB, "byte_in_set", CONST, cmpeqb)
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/* 2 argument overloaded functions added in ISA 3.0 (power9). */
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BU_P9_OVERLOAD_2 (CMPRB, "byte_in_range")
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BU_P9_OVERLOAD_2 (CMPRB2, "byte_in_either_range")
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BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
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/* 1 argument IEEE 128-bit floating-point functions. */
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BU_FLOAT128_1 (FABSQ, "fabsq", CONST, abskf2)
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@ -4926,6 +4926,13 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ P9V_BUILTIN_VEC_VPRTYBQ, P9V_BUILTIN_VPRTYBQ,
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RS6000_BTI_UINTTI, RS6000_BTI_UINTTI, 0, 0 },
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{ P9_BUILTIN_CMPRB, P9_BUILTIN_SCALAR_CMPRB,
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RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
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{ P9_BUILTIN_CMPRB2, P9_BUILTIN_SCALAR_CMPRB2,
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RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTSI, 0 },
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{ P9_BUILTIN_CMPEQB, P9_BUILTIN_SCALAR_CMPEQB,
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RS6000_BTI_INTSI, RS6000_BTI_UINTQI, RS6000_BTI_UINTDI, 0 },
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{ P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
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RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
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{ P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM,
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@ -15117,6 +15117,27 @@ long long __builtin_darn (void);
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long long __builtin_darn_raw (void);
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int __builtin_darn_32 (void);
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unsigned int scalar_extract_exp (double source);
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unsigned long long int scalar_extract_sig (double source);
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double
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scalar_insert_exp (unsigned long long int significand, unsigned long long int exponent);
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int scalar_cmp_exp_gt (double arg1, double arg2);
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int scalar_cmp_exp_lt (double arg1, double arg2);
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int scalar_cmp_exp_eq (double arg1, double arg2);
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int scalar_cmp_exp_unordered (double arg1, double arg2);
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int scalar_test_data_class (float source, unsigned int condition);
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int scalar_test_data_class (double source, unsigned int condition);
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|
||||
int scalar_test_neg (float source);
|
||||
int scalar_test_neg (double source);
|
||||
|
||||
int __builtin_byte_in_set (unsigned char u, unsigned long long set);
|
||||
int __builtin_byte_in_range (unsigned char u, unsigned int range);
|
||||
int __builtin_byte_in_either_range (unsigned char u, unsigned int ranges);
|
||||
|
||||
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
|
||||
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
|
||||
int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
|
||||
@ -15136,23 +15157,6 @@ int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
|
||||
int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
|
||||
int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
|
||||
int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
|
||||
|
||||
unsigned int scalar_extract_exp (double source);
|
||||
unsigned long long int scalar_extract_sig (double source);
|
||||
|
||||
double
|
||||
scalar_insert_exp (unsigned long long int significand, unsigned long long int exponent);
|
||||
|
||||
int scalar_cmp_exp_gt (double arg1, double arg2);
|
||||
int scalar_cmp_exp_lt (double arg1, double arg2);
|
||||
int scalar_cmp_exp_eq (double arg1, double arg2);
|
||||
int scalar_cmp_exp_unordered (double arg1, double arg2);
|
||||
|
||||
int scalar_test_data_class (float source, unsigned int condition);
|
||||
int scalar_test_data_class (double source, unsigned int condition);
|
||||
|
||||
int scalar_test_neg (float source);
|
||||
int scalar_test_neg (double source);
|
||||
@end smallexample
|
||||
|
||||
The @code{__builtin_darn} and @code{__builtin_darn_raw}
|
||||
@ -15207,6 +15211,24 @@ If all of the enabled test conditions are false, the return value is 0.
|
||||
The @code{scalar_test_neg} built-in functions return a non-zero value
|
||||
if their @code{source} argument holds a negative value.
|
||||
|
||||
The @code{__builtin_byte_in_set} function requires a
|
||||
64-bit environment supporting ISA 3.0 or later. This function returns
|
||||
a non-zero value if and only if its @code{u} argument exactly equals one of
|
||||
the eight bytes contained within its 64-bit @code{set} argument.
|
||||
|
||||
The @code{__builtin_byte_in_range} and
|
||||
@code{__builtin_byte_in_either_range} require an environment
|
||||
supporting ISA 3.0 or later. For these two functions, the
|
||||
@code{range} argument is encoded as 4 bytes, organized as
|
||||
@code{hi_1:lo_1:hi_2:lo_2}.
|
||||
The @code{__builtin_byte_in_range} function returns a
|
||||
non-zero value if and only if its @code{u} argument is within the
|
||||
range bounded between @code{lo_2} and @code{hi_2} inclusive.
|
||||
The @code{__builtin_byte_in_either_range} function returns non-zero if
|
||||
and only if its @code{u} argument is within either the range bounded
|
||||
between @code{lo_1} and @code{hi_1} inclusive or the range bounded
|
||||
between @code{lo_2} and @code{hi_2} inclusive.
|
||||
|
||||
The @code{__builtin_dfp_dtstsfi_lt} function returns a non-zero value
|
||||
if and only if the number of signficant digits of its @code{value} argument
|
||||
is less than its @code{comparison} argument. The
|
||||
|
||||
@ -1,3 +1,13 @@
|
||||
2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||||
|
||||
* gcc.target/powerpc/byte-in-either-range-0.c: New test.
|
||||
* gcc.target/powerpc/byte-in-either-range-1.c: New test.
|
||||
* gcc.target/powerpc/byte-in-range-0.c: New test.
|
||||
* gcc.target/powerpc/byte-in-range-1.c: New test.
|
||||
* gcc.target/powerpc/byte-in-set-0.c: New test.
|
||||
* gcc.target/powerpc/byte-in-set-1.c: New test.
|
||||
* gcc.target/powerpc/byte-in-set-2.c: New test.
|
||||
|
||||
2016-12-16 Jerry DeLisle <jvdelisle@gcc.gnu.org>
|
||||
|
||||
PR fortran/78622
|
||||
|
||||
25
gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c
Normal file
25
gcc/testsuite/gcc.target/powerpc/byte-in-either-range-0.c
Normal file
@ -0,0 +1,25 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power9" } */
|
||||
|
||||
/* This test should succeed on both 32- and 64-bit configurations. */
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_either_range (unsigned char b,
|
||||
unsigned char first_lo_bound,
|
||||
unsigned char first_hi_bound,
|
||||
unsigned char second_lo_bound,
|
||||
unsigned char second_hi_bound)
|
||||
{
|
||||
unsigned int range_encoding;
|
||||
range_encoding = ((first_hi_bound << 24) | (first_lo_bound << 16)
|
||||
| (second_hi_bound << 8) | second_lo_bound);
|
||||
|
||||
return __builtin_byte_in_either_range (b, range_encoding);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "cmprb" } } */
|
||||
/* { dg-final { scan-assembler "setb" } } */
|
||||
22
gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c
Normal file
22
gcc/testsuite/gcc.target/powerpc/byte-in-either-range-1.c
Normal file
@ -0,0 +1,22 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power8" } */
|
||||
|
||||
/* This test should succeed on both 32- and 64-bit configurations. */
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_either_range (unsigned char b,
|
||||
unsigned char first_lo_bound,
|
||||
unsigned char first_hi_bound,
|
||||
unsigned char second_lo_bound,
|
||||
unsigned char second_hi_bound)
|
||||
{
|
||||
unsigned int range_encoding;
|
||||
range_encoding = ((first_hi_bound << 24) | (first_lo_bound << 16)
|
||||
| (second_hi_bound << 8) | second_lo_bound);
|
||||
|
||||
return __builtin_byte_in_either_range (b, range_encoding); /* { dg-error "Builtin function __builtin_scalar_byte_in_either_range requires" } */
|
||||
}
|
||||
19
gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c
Normal file
19
gcc/testsuite/gcc.target/powerpc/byte-in-range-0.c
Normal file
@ -0,0 +1,19 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power9" } */
|
||||
|
||||
/* This test should succeed on both 32- and 64-bit configurations. */
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_range (unsigned char b,
|
||||
unsigned char low_range, unsigned char high_range)
|
||||
{
|
||||
unsigned int range_encoding = (high_range << 8) | low_range;
|
||||
return __builtin_byte_in_range (b, range_encoding);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "cmprb" } } */
|
||||
/* { dg-final { scan-assembler "setb" } } */
|
||||
16
gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c
Normal file
16
gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power8" } */
|
||||
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_range (unsigned char b,
|
||||
unsigned char low_range, unsigned char high_range)
|
||||
{
|
||||
unsigned int range_encoding = (high_range << 8) | low_range;
|
||||
return __builtin_byte_in_range (b, range_encoding); /* { dg-error "Builtin function __builtin_scalar_byte_in_range requires" } */
|
||||
}
|
||||
|
||||
18
gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c
Normal file
18
gcc/testsuite/gcc.target/powerpc/byte-in-set-0.c
Normal file
@ -0,0 +1,18 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
|
||||
/* { dg-require-effective-target lp64 } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power9" } */
|
||||
|
||||
/* This test should succeed only on 64-bit configurations. */
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_set (unsigned char b, unsigned long long set_members)
|
||||
{
|
||||
return __builtin_byte_in_set (b, set_members);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "cmpeqb" } } */
|
||||
/* { dg-final { scan-assembler "setb" } } */
|
||||
14
gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c
Normal file
14
gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c
Normal file
@ -0,0 +1,14 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
|
||||
/* { dg-require-effective-target lp64 } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power8" } */
|
||||
|
||||
#include <altivec.h>
|
||||
|
||||
int
|
||||
test_byte_in_set (unsigned char b, unsigned long long set_members)
|
||||
{
|
||||
return __builtin_byte_in_set (b, set_members); /* { dg-error "Builtin function __builtin_scalar_byte_in_set requires" } */
|
||||
}
|
||||
16
gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c
Normal file
16
gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c
Normal file
@ -0,0 +1,16 @@
|
||||
/* { dg-do compile { target { powerpc*-*-* } } } */
|
||||
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
|
||||
/* { dg-require-effective-target ilp32 } */
|
||||
/* { dg-require-effective-target powerpc_p9vector_ok } */
|
||||
/* { dg-skip-if "" { powerpc*-*-aix* } } */
|
||||
/* { dg-options "-mcpu=power9" } */
|
||||
|
||||
#include <altivec.h>
|
||||
|
||||
/* This test should succeed only on 32-bit configurations. */
|
||||
|
||||
int
|
||||
test_byte_in_set (unsigned char b, unsigned long long set_members)
|
||||
{
|
||||
return __builtin_byte_in_set (b, set_members); /* { dg-error "Builtin function __builtin_byte_in_set not supported in this compiler configuration" } */
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user