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[AArch64] Set ctz rtx_cost (PR93565)
Combine sometimes behaves oddly and duplicates ctz to remove an unnecessary sign extension. Avoid this by setting the cost for ctz to be higher than that of a simple ALU instruction. Deepsjeng performance improves by ~0.6%. gcc/ PR rtl-optimization/93565 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs. testsuite/ PR rtl-optimization/93565 * gcc.target/aarch64/pr93565.c: New test.
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2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
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PR rtl-optimization/93565
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* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
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2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64-simd.md
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@ -11507,6 +11507,13 @@ aarch64_rtx_costs (rtx x, machine_mode mode, int outer ATTRIBUTE_UNUSED,
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return false;
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case CTZ:
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*cost = COSTS_N_INSNS (2);
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if (speed)
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*cost += extra_cost->alu.clz + extra_cost->alu.rev;
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return false;
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case COMPARE:
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op0 = XEXP (x, 0);
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op1 = XEXP (x, 1);
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@ -1,3 +1,8 @@
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2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
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PR rtl-optimization/93565
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* gcc.target/aarch64/pr93565.c: New test.
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2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
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* gcc.target/aarch64/popcnt2.c: New test.
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34
gcc/testsuite/gcc.target/aarch64/pr93565.c
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gcc/testsuite/gcc.target/aarch64/pr93565.c
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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static const unsigned long long magic = 0x03f08c5392f756cdULL;
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static const char table[64] = {
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0, 1, 12, 2, 13, 22, 17, 3,
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14, 33, 23, 36, 18, 58, 28, 4,
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62, 15, 34, 26, 24, 48, 50, 37,
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19, 55, 59, 52, 29, 44, 39, 5,
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63, 11, 21, 16, 32, 35, 57, 27,
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61, 25, 47, 49, 54, 51, 43, 38,
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10, 20, 31, 56, 60, 46, 53, 42,
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9, 30, 45, 41, 8, 40, 7, 6,
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};
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static inline int ctz1 (unsigned long b)
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{
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unsigned long lsb = b & -b;
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return table[(lsb * magic) >> 58];
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}
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void f (unsigned long x, int *p)
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{
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if (x != 0)
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{
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int a = ctz1 (x);
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*p = a | p[a];
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}
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}
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/* { dg-final { scan-assembler-times "rbit\t" 1 } } */
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/* { dg-final { scan-assembler-times "clz\t" 1 } } */
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