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Add insn types for fusion pairs

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This adds new values for insn attr type for p10 fusion. The genfusion.pl
script is modified to use them, and fusion.md regenerated to capture
the new patterns. There are also some formatting only changes to
fusion.md that apparently weren't captured after a previous commit
of genfusion.pl.

gcc/
	* config/rs6000/rs6000.md (define_attr "type"): Add types for fusion.
	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Use new fusion types.
	(gen_2logical): Use new fusion types.
	* config/rs6000/fusion.md: Regenerate.
This commit is contained in:
Aaron Sawdey 2021-03-02 17:50:52 -06:00
parent 2df9d3c52e
commit 5ae352467a
3 changed files with 168 additions and 148 deletions
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288
gcc/config/rs6000/fusion.md
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File diff suppressed because it is too large Load Diff

8
gcc/config/rs6000/genfusion.pl
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@ -135,7 +135,7 @@ sub gen_ld_cmpi_p10
print " (set (match_dup 2)\n";
print " (compare:${ccmode} (match_dup 0) (match_dup 3)))]\n";
print " \"\"\n";
print " [(set_attr \"type\" \"load\")\n";
print " [(set_attr \"type\" \"fused_load_cmpi\")\n";
print " (set_attr \"cost\" \"8\")\n";
print " (set_attr \"length\" \"8\")])\n";
print "\n";
@ -159,18 +159,20 @@ sub gen_2logical
my ($kind, $vchr, $mode, $pred, $constraint, $cr, $outer, $outer_op,
$outer_comp, $outer_inv, $outer_rtl, $inner, $inner_comp, $inner_inv,
$inner_rtl, $inner_op, $both_commute, $c4, $bc, $inner_arg0,
$inner_arg1, $inner_exp, $outer_arg2, $outer_exp, $insn);
$inner_arg1, $inner_exp, $outer_arg2, $outer_exp, $insn, $fuse_type);
KIND: foreach $kind ('scalar','vector') {
if ( $kind eq 'vector' ) {
$vchr = "v";
$mode = "VM";
$pred = "altivec_register_operand";
$constraint = "v";
$fuse_type = "fused_vector";
} else {
$vchr = "";
$mode = "GPR";
$pred = "gpc_reg_operand";
$constraint = "r";
$fuse_type = "fused_arith_logical";
}
$c4 = "${constraint},${constraint},${constraint},${constraint}";
OUTER: foreach $outer ( @logicals ) {
@ -227,7 +229,7 @@ sub gen_2logical
${inner_op} %3,%1,%0\\;${outer_op} %3,%3,%2
${inner_op} %3,%1,%0\\;${outer_op} %3,%3,%2
${inner_op} %4,%1,%0\\;${outer_op} %3,%4,%2"
[(set_attr "type" "logical")
[(set_attr "type" "$fuse_type")
(set_attr "cost" "6")
(set_attr "length" "8")])
EOF

20
gcc/config/rs6000/rs6000.md
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@ -206,8 +206,26 @@
vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,
vecfloat,vecfdiv,vecdouble,mtvsr,mfvsr,crypto,
veclogical,veccmpfx,vecexts,vecmove,
htm,htmsimple,dfp,mma"
htm,htmsimple,dfp,mma,
fused_arith_logical,
fused_cmp_isel,
fused_carry,
fused_load_cmpi,
fused_load_load,fused_store_store,
fused_addis_load,
fused_mtbc,
fused_vector"
(const_string "integer"))
;; Attr type definitions for fused pairs:
;; fused_arith_logical is used for scalar logical+add/subf and
;; add/subf+logical pairs of instructions.
;; fused_load_cmpi is used for a D-form load fused with
;; a compare immediate.
;; fused_load_load is for a fused pair of loads to adjacent addresses.
;; fused_store_store is for a fused pair of stores to adjacent addresses.
;; fused_addis_load is for addis fused to D-form load for a larger immediate.
;; fused_mtbc is for fused mtlr and bclr[l] pairs.
;; fused_vector is for a fused pair of vector logical instructions.
;; What data size does this instruction work on?
;; This is used for insert, mul and others as necessary.