diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c14287a85e7..9b61fa6011a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Mon Jun 3 19:11:53 CEST 2002 Jan Hubicka + + * except.c (except.c): Do not rebuild CFG. + * toplev.c (rest_of_compilation): Recompute CFG after sibcall + optimization. + Mon Jun 3 11:53:01 CEST 2002 Jan Hubicka * integrate.c (copy_insn_list): Properly pace the INSN_SCOPE copies. diff --git a/gcc/except.c b/gcc/except.c index 5b21d64acd6..a2f2c69a1e1 100644 --- a/gcc/except.c +++ b/gcc/except.c @@ -2499,8 +2499,6 @@ finish_eh_generation () connect many of the handlers, and then type information will not be effective. Still, this is a win over previous implementations. */ - rebuild_jump_labels (get_insns ()); - find_basic_blocks (get_insns (), max_reg_num (), 0); cleanup_cfg (CLEANUP_PRE_LOOP | CLEANUP_NO_INSN_DEL); /* These registers are used by the landing pads. Make sure they diff --git a/gcc/toplev.c b/gcc/toplev.c index 4c52a04c7a2..702937591b1 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -2560,6 +2560,12 @@ rest_of_compilation (decl) rtx insn; optimize_sibling_and_tail_recursive_calls (); + /* Recompute the CFG as sibling optimization clobbers it randomly. */ + free_bb_for_insn (); + find_exception_handler_labels (); + rebuild_jump_labels (insns); + find_basic_blocks (insns, max_reg_num (), rtl_dump_file); + /* There is pass ordering problem - we must lower NOTE_INSN_PREDICTION notes before simplifying cfg and we must do lowering after sibcall that unhides parts of RTL chain and cleans up the CFG. @@ -2576,7 +2582,6 @@ rest_of_compilation (decl) scope_to_insns_initialize (); /* Complete generation of exception handling code. */ - find_exception_handler_labels (); if (doing_eh (0)) { timevar_push (TV_JUMP);