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haifa-sched.c (split_block_insns): Don't supress insn splitting on subsequent passes.
* haifa-sched.c (split_block_insns): Don't supress insn splitting on subsequent passes. * alpha.c (hard_fp_register_operand): New function. * alpha.h (PREDICATE_CODES): Add it. * alpha.md (extendsidi2): Kill bogus f<-f cvtql+cvtlq case. Add an f<-m case and accompanying define_split. (trapb): Use a unique unspec_volatile number. From-SVN: r18992
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@ -1,3 +1,14 @@
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Sat Apr 4 13:50:01 1998 Richard Henderson <rth@cygnus.com>
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* haifa-sched.c (split_block_insns): Don't supress insn splitting
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on subsequent passes.
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* alpha.c (hard_fp_register_operand): New function.
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* alpha.h (PREDICATE_CODES): Add it.
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* alpha.md (extendsidi2): Kill bogus f<-f cvtql+cvtlq case. Add an
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f<-m case and accompanying define_split.
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(trapb): Use a unique unspec_volatile number.
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Sat Apr 4 13:32:08 1998 Richard Henderson <rth@cygnus.com>
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* configure.in (alpha-*-linux-gnu*): Undo Feb 3 change brought in
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@ -519,6 +519,18 @@ reg_or_fp0_operand (op, mode)
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return fp0_operand (op, mode) || register_operand (op, mode);
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}
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/* Return 1 if OP is a hard floating-point register. */
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int
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hard_fp_register_operand (op, mode)
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register rtx op;
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enum machine_mode mode;
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{
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return ((GET_CODE (op) == REG && REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS)
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|| (GET_CODE (op) == SUBREG
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&& hard_fp_register_operand (SUBREG_REG (op), mode)));
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}
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/* Return 1 if OP is a register or a constant integer. */
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@ -2211,7 +2211,8 @@ do { \
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{"aligned_memory_operand", {MEM}}, \
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{"unaligned_memory_operand", {MEM}}, \
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{"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
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{"any_memory_operand", {MEM}},
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{"any_memory_operand", {MEM}}, \
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{"hard_fp_register_operand", {SUBREG, REG}},
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/* Tell collect that the object format is ECOFF. */
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#define OBJECT_FORMAT_COFF
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@ -20,6 +20,23 @@
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;; Boston, MA 02111-1307, USA.
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;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
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;; Uses of UNSPEC in this file:
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;;
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;; 0 arg_home
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;; 1 cttz
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;; 2 insxh
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;; 3 mskxh
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;; 4 cvtlq
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;;
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;; UNSPEC_VOLATILE:
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;;
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;; 0 imb
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;; 1 blockage
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;; 2 builtin_setjmp_receiver
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;; 3 builtin_longjmp
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;; 4 trapb
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;; Processor type -- this attribute must exactly match the processor_type
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;; enumeration in alpha.h.
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@ -343,27 +360,47 @@
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; ??? The FPU communicates with memory and the integer register file
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; via two fp store units. We need a slot in the fst immediately, and
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; a slot in LOW after the operand data is ready. At which point the
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; data may be movedeither to the store queue or the integer register
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; data may be moved either to the store queue or the integer register
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; file and the insn retired.
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;; First define the arithmetic insns. Note that the 32-bit forms also
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;; sign-extend.
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;; Note that we can do sign extensions in both FP and integer registers.
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;; However, the result must be in the same type of register as the input.
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;; The register preferencing code can't handle this case very well, so, for
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;; now, don't let the FP case show up here for preferencing. Also,
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;; sign-extends in FP registers take two instructions.
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;; Handle 32-64 bit extension from memory to a floating point register
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;; specially, since this ocurrs frequently in int->double conversions.
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;; This is done with a define_split after reload converting the plain
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;; sign-extension into a load+unspec, which of course results in lds+cvtlq.
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;;
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;; Note that while we must retain the =f case in the insn for reload's
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;; benefit, it should be eliminated after reload, so we should never emit
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;; code for that case. But we don't reject the possibility.
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(define_insn "extendsidi2"
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[(set (match_operand:DI 0 "register_operand" "=r,r,*f")
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(sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m,*f")))]
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[(set (match_operand:DI 0 "register_operand" "=r,r,?f")
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(sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m,m")))]
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""
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"@
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addl %1,$31,%0
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ldl %0,%1
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cvtql %1,%0\;cvtlq %0,%0"
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[(set_attr "type" "iadd,ild,fadd")])
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lds %0,%1\;cvtlq %0,%0"
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[(set_attr "type" "iadd,ild,fld")])
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;; Due to issues with CLASS_CANNOT_CHANGE_SIZE, we cannot use a subreg here.
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(define_split
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[(set (match_operand:DI 0 "hard_fp_register_operand" "")
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(sign_extend:DI (match_operand:SI 1 "memory_operand" "")))]
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"reload_completed"
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[(set (match_dup 2) (match_dup 1))
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(set (match_dup 0) (unspec:DI [(match_dup 2)] 4))]
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"operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));")
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(define_insn ""
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[(set (match_operand:DI 0 "register_operand" "=f")
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(unspec:DI [(match_operand:SI 1 "register_operand" "f")] 4))]
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""
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"cvtlq %1,%0"
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[(set_attr "type" "fadd")])
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;; Do addsi3 the way expand_binop would do if we didn't have one. This
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;; generates better code. We have the anonymous addsi3 pattern below in
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@ -5122,7 +5159,7 @@
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;; by alpha_reorg.
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(define_insn "trapb"
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[(unspec_volatile [(const_int 0)] 3)]
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[(unspec_volatile [(const_int 0)] 4)]
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""
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"trapb"
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[(set_attr "type" "misc")])
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@ -8234,8 +8234,7 @@ split_block_insns (b)
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for (insn = basic_block_head[b];; insn = next)
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{
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rtx prev;
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rtx set;
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rtx set, last, first, notes;
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/* Can't use `next_real_insn' because that
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might go across CODE_LABELS and short-out basic blocks. */
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@ -8272,31 +8271,24 @@ split_block_insns (b)
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}
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/* Split insns here to get max fine-grain parallelism. */
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prev = PREV_INSN (insn);
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/* It is probably not worthwhile to try to split again in
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the second pass. However, if flag_schedule_insns is not set,
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the first and only (if any) scheduling pass is after reload. */
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if (reload_completed == 0 || ! flag_schedule_insns)
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first = PREV_INSN (insn);
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notes = REG_NOTES (insn);
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last = try_split (PATTERN (insn), insn, 1);
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if (last != insn)
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{
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rtx last, first = PREV_INSN (insn);
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rtx notes = REG_NOTES (insn);
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last = try_split (PATTERN (insn), insn, 1);
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if (last != insn)
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{
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/* try_split returns the NOTE that INSN became. */
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first = NEXT_INSN (first);
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update_flow_info (notes, first, last, insn);
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/* try_split returns the NOTE that INSN became. */
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first = NEXT_INSN (first);
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update_flow_info (notes, first, last, insn);
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PUT_CODE (insn, NOTE);
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NOTE_SOURCE_FILE (insn) = 0;
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NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
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if (insn == basic_block_head[b])
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basic_block_head[b] = first;
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if (insn == basic_block_end[b])
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{
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basic_block_end[b] = last;
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break;
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}
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PUT_CODE (insn, NOTE);
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NOTE_SOURCE_FILE (insn) = 0;
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NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
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if (insn == basic_block_head[b])
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basic_block_head[b] = first;
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if (insn == basic_block_end[b])
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{
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basic_block_end[b] = last;
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break;
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}
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}
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