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rs6000.opt (rs6000_isa_flags): New flag word to replace target_flags that gives us 63 possible switches.

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2012-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.opt (rs6000_isa_flags): New flag word to
	replace target_flags that gives us 63 possible switches.
	(x_rs6000_isa_flags): Save area for rs6000_isa_flags.
	(x_rs6000_isa_flags_explicit): Save area for
	rs6000_isa_flags_explicit.
	(rs6000_target_flags_explicit): Delete in favor of
	x_rs6000_isa_flags_explicit.
	(-mpowerpc64): Change all switches that used to be in target_flags
	to now be in rs6000_isa_flags.  In using rs6000_isa_flags, the
	options machinary will generate names of the form OPITON_<xxx>
	instead of TARGET_<xxx> and OPTION_MASK_<xxx> instead of
	MASK_<xxx>.
	(-mpowerpc-gpopt): Likewise.
	(-mpowerpc-gfxopt): Likewise.
	(-mmfcrf): Likewise.
	(-mpopcntb): Likewise.
	(-mfprnd): Likewise.
	(-mcmpb): Likewise.
	(-mmfpgpr): Likewise.
	(-maltivec): Likewise.
	(-mhard-dfp): Likewise.
	(-mmulhw): Likewise.
	(-mdlmzb): Likewise.
	(-mmultiple): Likewise.
	(-mstring): Likewise.
	(-msoft-float): Likewise.
	(-mhard-float): Likewise.
	(-mpopcntd): Likewise.
	(-mvsx): Likewise.
	(-mno-update): Likewise.
	(-mupdate): Likewise.
	(-mrecip-precision): Likewise.
	(-mminimal-toc): Likewise.
	(-misel): Likewise.
	* config/rs6000/aix64.opt (-maix64): Likewise.
	(-maix32): Likewise.
	* config/rs6000/sysv4.opt (-mstrict-align): Likewise.
	(-mrelocatable): Likewise.
	(-mlittle-endian): Likewise.
	(-mlittle): Likewise.
	(-mbig-endian): LIkewise.
	(-mbig): Likewise.
	(-meabi): Likewise.
	(-m64): Likewise.
	(-m32): Likewise.
	* config/rs6000/darwin.opt (-m64): Likewise.
	(-m32): Likewise.

	* config/rs6000/rs6000-cpus.def (ISA_2_1_MASKS): Move the various
	masks used in rs6000.c here, since they are more logically in this
	file.  Convert from being enums to just #defines, since the types
	of these masks is now HOST_WIDE_INT instead of int.  For
	POWERPC_MASKS, add MASK_SOFT_FLOAT, since the only use case or'ed
	in the mask.  Change the use in rs6000.c not to do the OR of
	MASK_SOFT_FLOAT.
	(ISA_2_1_MASKS): Likewise.
	(ISA_2_2_MASKS): Likewise.
	(ISA_2_4_MASKS): Likewise.
	(ISA_2_5_MASKS_EMBEDDED): Likewise.
	(ISA_2_5_MASKS_SERVER): Likewise.
	(POWERPC_7400_MASK): Likewise.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.c (ISA_2_1_MASKS): Likewise.
	(ISA_2_1_MASKS): Likewise.
	(ISA_2_2_MASKS): Likewise.
	(ISA_2_4_MASKS): Likewise.
	(ISA_2_5_MASKS_EMBEDDED): Likewise.
	(ISA_2_5_MASKS_SERVER): Likewise.
	(POWERPC_7400_MASK): Likewise.
	(POWERPC_MASKS): Likewise.
	(rs6000_option_override_internal): Likewise.

	* config/rs6000/rs6000.c (darwin_rs6000_override_options): Change
	all uses of target_flags to rs6000_isa_flags.  Change all uses of
	target_flags_explicit to rs6000_isa_flags_explicit.  Change the
	use of MASK_<xxx> to OPTION_MASK_<xxx> that options.h defines when
	we use a secondary flags word.  Save/restore/print the new flags
	word when switching contexts with different target attributes.
	(rs6000_option_override_internal): Likewise.
	(rs6000_darwin_file_start): Likewise.
	(rs6000_opt_masks): Likewise.
	(rs6000_inner_target_options): Likewise.
	(rs6000_pragma_target_parse): Likewise.
	(rs6000_set_current_function): Likewise.
	(rs6000_function_specific_save): Likewise.
	(rs6000_function_specific_restore): Likewise.
	(rs6000_function_specific_print): Likewise.
	(rs6000_can_inline_p): Likewise.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
	Likewise.
	(rs6000_cpu_cpp_builtins): Likewise.
	* common/config/rs6000/rs6000-driver.c (rs6000_handle_option):
	Likewise.

	* config/rs6000/rs6000.h (MASK_ALTIVEC): In moving to using
	Var(...) for all of the isa switches, the options machinery now
	uses OPTION_MASK_<xxx> instead of MASK_<xxx> for the mask name.
	Use #define to map the old name into the new name.  For switches
	that are defined in aix64.opt, sysv4.opt, and darwin.opt, only do
	the definition if those switches were defined.
	(MASK_ALTIVEC): Likewise.
	(MASK_CMPB): Likewise.
	(MASK_DFP): Likewise.
	(MASK_DLMZB): Likewise.
	(MASK_EABI): Likewise.
	(MASK_FPRND): Likewise.
	(MASK_HARD_FLOAT): Likewise.
	(MASK_ISEL): Likewise.
	(MASK_MFCRF): Likewise.
	(MASK_MFPGPR): Likewise.
	(MASK_MULHW): Likewise.
	(MASK_MULTIPLE): Likewise.
	(MASK_NO_UPDATE): Likewise.
	(MASK_POPCNTB): Likewise.
	(MASK_POPCNTD): Likewise.
	(MASK_PPC_GFXOPT): Likewise.
	(MASK_PPC_GPOPT): Likewise.
	(MASK_RECIP_PRECISION): Likewise.
	(MASK_SOFT_FLOAT): Likewise.
	(MASK_STRICT_ALIGN): Likewise.
	(MASK_STRING): Likewise.
	(MASK_UPDATE): Likewise.
	(MASK_VSX): Likewise.
	(MASK_POWERPC64): Likewise.
	(MASK_64BIT): Likewise.
	(MASK_RELOCATABLE): Likewise.
	(MASK_LITTLE_ENDIAN): Likewise.
	(MASK_MINIMAL_TOC): Likewise.
	(MASK_REGNAMES): Likewise.
	(MASK_PROTOTYPE): Likewise.
	(rs6000_isa_flags_explicit): Define in terms of the
	global_options_set structure.

	* gcc/config/rs6000/aix43.h (SUBTARGET_OVERRIDE_OPTIONS):
	Change use of target_flags to rs6000_isa_flags,
	target_flags_explicit to rs6000_isa_flags_explicit, and MASK_<xxx>
	to OPTION_MASK_<xxx>.
	* gcc/config/rs6000/aix51.h (SUBTARGET_OVERRIDE_OPTIONS):
	Likewise.
	* gcc/config/rs6000/aix52.h (SUBTARGET_OVERRIDE_OPTIONS):
	Likewise.
	* gcc/config/rs6000/aix53.h (SUBTARGET_OVERRIDE_OPTIONS):
	Likewise.
	* gcc/config/rs6000/aix61.h (SUBTARGET_OVERRIDE_OPTIONS):
	Likewise.
	* gcc/config/rs6000/freebsd64.h (RELOCATABLE_NEEDS_FIXUP):
	Likewise.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
	* gcc/config/rs6000/freebsd.h (RELOCATABLE_NEEDS_FIXUP):
	Likewise.
	* gcc/config/rs6000/linux64.h (RELOCATABLE_NEEDS_FIXUP):
	Likewise.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(OPTION_LITTLE_ENDIAN): Likewise.
	(OPTION_RELOCATABLE): Likewise.
	(OPTION_EABI): Likewise.
	(OPTION_PROTOTYPE): Likewise.
	* gcc/config/rs6000/linux.h (RELOCATABLE_NEEDS_FIXUP): Likewise.
	* gcc/config/rs6000/option-defaults.h (OPTION_MASK_64BIT):
	Likewise.
	(OPT_ARCH32): Likewise.
	(OPT_ARCH64): Likewise.
	* gcc/config/rs6000/sysv4.h (TARGET_TOC): Likewise.
	(SUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(TARGET_OS_SYSV_CPP_BUILTINS): Likewise.

	* config/rs6000/t-rs6000 (rs6000.o): Add rs6000-cpus.def as a
	dependency.

From-SVN: r192545
This commit is contained in:
Michael Meissner 2012-10-17 20:12:38 +00:00 committed by Michael Meissner
parent bf45c4c0c1
commit 4d9675496a
22 changed files with 532 additions and 262 deletions
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172
gcc/ChangeLog
View File

@ -1,3 +1,175 @@
2012-10-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.opt (rs6000_isa_flags): New flag word to
replace target_flags that gives us 63 possible switches.
(x_rs6000_isa_flags): Save area for rs6000_isa_flags.
(x_rs6000_isa_flags_explicit): Save area for
rs6000_isa_flags_explicit.
(rs6000_target_flags_explicit): Delete in favor of
x_rs6000_isa_flags_explicit.
(-mpowerpc64): Change all switches that used to be in target_flags
to now be in rs6000_isa_flags. In using rs6000_isa_flags, the
options machinary will generate names of the form OPITON_<xxx>
instead of TARGET_<xxx> and OPTION_MASK_<xxx> instead of
MASK_<xxx>.
(-mpowerpc-gpopt): Likewise.
(-mpowerpc-gfxopt): Likewise.
(-mmfcrf): Likewise.
(-mpopcntb): Likewise.
(-mfprnd): Likewise.
(-mcmpb): Likewise.
(-mmfpgpr): Likewise.
(-maltivec): Likewise.
(-mhard-dfp): Likewise.
(-mmulhw): Likewise.
(-mdlmzb): Likewise.
(-mmultiple): Likewise.
(-mstring): Likewise.
(-msoft-float): Likewise.
(-mhard-float): Likewise.
(-mpopcntd): Likewise.
(-mvsx): Likewise.
(-mno-update): Likewise.
(-mupdate): Likewise.
(-mrecip-precision): Likewise.
(-mminimal-toc): Likewise.
(-misel): Likewise.
* config/rs6000/aix64.opt (-maix64): Likewise.
(-maix32): Likewise.
* config/rs6000/sysv4.opt (-mstrict-align): Likewise.
(-mrelocatable): Likewise.
(-mlittle-endian): Likewise.
(-mlittle): Likewise.
(-mbig-endian): LIkewise.
(-mbig): Likewise.
(-meabi): Likewise.
(-m64): Likewise.
(-m32): Likewise.
* config/rs6000/darwin.opt (-m64): Likewise.
(-m32): Likewise.
* config/rs6000/rs6000-cpus.def (ISA_2_1_MASKS): Move the various
masks used in rs6000.c here, since they are more logically in this
file. Convert from being enums to just #defines, since the types
of these masks is now HOST_WIDE_INT instead of int. For
POWERPC_MASKS, add MASK_SOFT_FLOAT, since the only use case or'ed
in the mask. Change the use in rs6000.c not to do the OR of
MASK_SOFT_FLOAT.
(ISA_2_1_MASKS): Likewise.
(ISA_2_2_MASKS): Likewise.
(ISA_2_4_MASKS): Likewise.
(ISA_2_5_MASKS_EMBEDDED): Likewise.
(ISA_2_5_MASKS_SERVER): Likewise.
(POWERPC_7400_MASK): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.c (ISA_2_1_MASKS): Likewise.
(ISA_2_1_MASKS): Likewise.
(ISA_2_2_MASKS): Likewise.
(ISA_2_4_MASKS): Likewise.
(ISA_2_5_MASKS_EMBEDDED): Likewise.
(ISA_2_5_MASKS_SERVER): Likewise.
(POWERPC_7400_MASK): Likewise.
(POWERPC_MASKS): Likewise.
(rs6000_option_override_internal): Likewise.
* config/rs6000/rs6000.c (darwin_rs6000_override_options): Change
all uses of target_flags to rs6000_isa_flags. Change all uses of
target_flags_explicit to rs6000_isa_flags_explicit. Change the
use of MASK_<xxx> to OPTION_MASK_<xxx> that options.h defines when
we use a secondary flags word. Save/restore/print the new flags
word when switching contexts with different target attributes.
(rs6000_option_override_internal): Likewise.
(rs6000_darwin_file_start): Likewise.
(rs6000_opt_masks): Likewise.
(rs6000_inner_target_options): Likewise.
(rs6000_pragma_target_parse): Likewise.
(rs6000_set_current_function): Likewise.
(rs6000_function_specific_save): Likewise.
(rs6000_function_specific_restore): Likewise.
(rs6000_function_specific_print): Likewise.
(rs6000_can_inline_p): Likewise.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
Likewise.
(rs6000_cpu_cpp_builtins): Likewise.
* common/config/rs6000/rs6000-driver.c (rs6000_handle_option):
Likewise.
* config/rs6000/rs6000.h (MASK_ALTIVEC): In moving to using
Var(...) for all of the isa switches, the options machinery now
uses OPTION_MASK_<xxx> instead of MASK_<xxx> for the mask name.
Use #define to map the old name into the new name. For switches
that are defined in aix64.opt, sysv4.opt, and darwin.opt, only do
the definition if those switches were defined.
(MASK_ALTIVEC): Likewise.
(MASK_CMPB): Likewise.
(MASK_DFP): Likewise.
(MASK_DLMZB): Likewise.
(MASK_EABI): Likewise.
(MASK_FPRND): Likewise.
(MASK_HARD_FLOAT): Likewise.
(MASK_ISEL): Likewise.
(MASK_MFCRF): Likewise.
(MASK_MFPGPR): Likewise.
(MASK_MULHW): Likewise.
(MASK_MULTIPLE): Likewise.
(MASK_NO_UPDATE): Likewise.
(MASK_POPCNTB): Likewise.
(MASK_POPCNTD): Likewise.
(MASK_PPC_GFXOPT): Likewise.
(MASK_PPC_GPOPT): Likewise.
(MASK_RECIP_PRECISION): Likewise.
(MASK_SOFT_FLOAT): Likewise.
(MASK_STRICT_ALIGN): Likewise.
(MASK_STRING): Likewise.
(MASK_UPDATE): Likewise.
(MASK_VSX): Likewise.
(MASK_POWERPC64): Likewise.
(MASK_64BIT): Likewise.
(MASK_RELOCATABLE): Likewise.
(MASK_LITTLE_ENDIAN): Likewise.
(MASK_MINIMAL_TOC): Likewise.
(MASK_REGNAMES): Likewise.
(MASK_PROTOTYPE): Likewise.
(rs6000_isa_flags_explicit): Define in terms of the
global_options_set structure.
* gcc/config/rs6000/aix43.h (SUBTARGET_OVERRIDE_OPTIONS):
Change use of target_flags to rs6000_isa_flags,
target_flags_explicit to rs6000_isa_flags_explicit, and MASK_<xxx>
to OPTION_MASK_<xxx>.
* gcc/config/rs6000/aix51.h (SUBTARGET_OVERRIDE_OPTIONS):
Likewise.
* gcc/config/rs6000/aix52.h (SUBTARGET_OVERRIDE_OPTIONS):
Likewise.
* gcc/config/rs6000/aix53.h (SUBTARGET_OVERRIDE_OPTIONS):
Likewise.
* gcc/config/rs6000/aix61.h (SUBTARGET_OVERRIDE_OPTIONS):
Likewise.
* gcc/config/rs6000/freebsd64.h (RELOCATABLE_NEEDS_FIXUP):
Likewise.
(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
* gcc/config/rs6000/freebsd.h (RELOCATABLE_NEEDS_FIXUP):
Likewise.
* gcc/config/rs6000/linux64.h (RELOCATABLE_NEEDS_FIXUP):
Likewise.
(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
(OPTION_LITTLE_ENDIAN): Likewise.
(OPTION_RELOCATABLE): Likewise.
(OPTION_EABI): Likewise.
(OPTION_PROTOTYPE): Likewise.
* gcc/config/rs6000/linux.h (RELOCATABLE_NEEDS_FIXUP): Likewise.
* gcc/config/rs6000/option-defaults.h (OPTION_MASK_64BIT):
Likewise.
(OPT_ARCH32): Likewise.
(OPT_ARCH64): Likewise.
* gcc/config/rs6000/sysv4.h (TARGET_TOC): Likewise.
(SUBTARGET_OVERRIDE_OPTIONS): Likewise.
(SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise.
(TARGET_OS_SYSV_CPP_BUILTINS): Likewise.
* config/rs6000/t-rs6000 (rs6000.o): Add rs6000-cpus.def as a
dependency.
2012-10-17 Jan Hubicka <jh@suse.cz> 2012-10-17 Jan Hubicka <jh@suse.cz>
* cfgloopmanip.c (copy_loop_info): New function. * cfgloopmanip.c (copy_loop_info): New function.

57
gcc/common/config/rs6000/rs6000-common.c
View File

@ -82,23 +82,23 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
switch (code) switch (code)
{ {
case OPT_mfull_toc: case OPT_mfull_toc:
opts->x_target_flags &= ~MASK_MINIMAL_TOC; opts->x_rs6000_isa_flags &= ~OPTION_MASK_MINIMAL_TOC;
opts->x_TARGET_NO_FP_IN_TOC = 0; opts->x_TARGET_NO_FP_IN_TOC = 0;
opts->x_TARGET_NO_SUM_IN_TOC = 0; opts->x_TARGET_NO_SUM_IN_TOC = 0;
opts_set->x_target_flags |= MASK_MINIMAL_TOC; opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
#ifdef TARGET_USES_SYSV4_OPT #ifdef TARGET_USES_SYSV4_OPT
/* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be /* Note, V.4 no longer uses a normal TOC, so make -mfull-toc, be
just the same as -mminimal-toc. */ just the same as -mminimal-toc. */
opts->x_target_flags |= MASK_MINIMAL_TOC; opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
opts_set->x_target_flags |= MASK_MINIMAL_TOC; opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
#endif #endif
break; break;
#ifdef TARGET_USES_SYSV4_OPT #ifdef TARGET_USES_SYSV4_OPT
case OPT_mtoc: case OPT_mtoc:
/* Make -mtoc behave like -mminimal-toc. */ /* Make -mtoc behave like -mminimal-toc. */
opts->x_target_flags |= MASK_MINIMAL_TOC; opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
opts_set->x_target_flags |= MASK_MINIMAL_TOC; opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
break; break;
#endif #endif
@ -107,9 +107,10 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
#else #else
case OPT_m64: case OPT_m64:
#endif #endif
opts->x_target_flags |= MASK_POWERPC64; opts->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
opts->x_target_flags |= ~opts_set->x_target_flags & MASK_PPC_GFXOPT; opts->x_rs6000_isa_flags |= (~opts_set->x_rs6000_isa_flags
opts_set->x_target_flags |= MASK_POWERPC64; & OPTION_MASK_PPC_GFXOPT);
opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
break; break;
#ifdef TARGET_USES_AIX64_OPT #ifdef TARGET_USES_AIX64_OPT
@ -117,8 +118,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
#else #else
case OPT_m32: case OPT_m32:
#endif #endif
opts->x_target_flags &= ~MASK_POWERPC64; opts->x_rs6000_isa_flags &= ~OPTION_MASK_POWERPC64;
opts_set->x_target_flags |= MASK_POWERPC64; opts_set->x_rs6000_isa_flags |= OPTION_MASK_POWERPC64;
break; break;
case OPT_mminimal_toc: case OPT_mminimal_toc:
@ -181,8 +182,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
case OPT_mrelocatable: case OPT_mrelocatable:
if (value == 1) if (value == 1)
{ {
opts->x_target_flags |= MASK_MINIMAL_TOC; opts->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
opts_set->x_target_flags |= MASK_MINIMAL_TOC; opts_set->x_rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC;
opts->x_TARGET_NO_FP_IN_TOC = 1; opts->x_TARGET_NO_FP_IN_TOC = 1;
} }
break; break;
@ -190,14 +191,16 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
case OPT_mrelocatable_lib: case OPT_mrelocatable_lib:
if (value == 1) if (value == 1)
{ {
opts->x_target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC; opts->x_rs6000_isa_flags |= (OPTION_MASK_RELOCATABLE
opts_set->x_target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC; | OPTION_MASK_MINIMAL_TOC);
opts_set->x_rs6000_isa_flags |= (OPTION_MASK_RELOCATABLE
| OPTION_MASK_MINIMAL_TOC);
opts->x_TARGET_NO_FP_IN_TOC = 1; opts->x_TARGET_NO_FP_IN_TOC = 1;
} }
else else
{ {
opts->x_target_flags &= ~MASK_RELOCATABLE; opts->x_rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE;
opts_set->x_target_flags |= MASK_RELOCATABLE; opts_set->x_rs6000_isa_flags |= OPTION_MASK_RELOCATABLE;
} }
break; break;
#endif #endif
@ -227,15 +230,15 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
"-msingle-float option equivalent to -mhard-float"); "-msingle-float option equivalent to -mhard-float");
/* -msingle-float implies -mno-double-float and TARGET_HARD_FLOAT. */ /* -msingle-float implies -mno-double-float and TARGET_HARD_FLOAT. */
opts->x_rs6000_double_float = 0; opts->x_rs6000_double_float = 0;
opts->x_target_flags &= ~MASK_SOFT_FLOAT; opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
opts_set->x_target_flags |= MASK_SOFT_FLOAT; opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
break; break;
case OPT_mdouble_float: case OPT_mdouble_float:
/* -mdouble-float implies -msingle-float and TARGET_HARD_FLOAT. */ /* -mdouble-float implies -msingle-float and TARGET_HARD_FLOAT. */
opts->x_rs6000_single_float = 1; opts->x_rs6000_single_float = 1;
opts->x_target_flags &= ~MASK_SOFT_FLOAT; opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
opts_set->x_target_flags |= MASK_SOFT_FLOAT; opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
break; break;
case OPT_msimple_fpu: case OPT_msimple_fpu:
@ -259,8 +262,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
{ {
/* If -mfpu is not none, then turn off SOFT_FLOAT, turn on /* If -mfpu is not none, then turn off SOFT_FLOAT, turn on
HARD_FLOAT. */ HARD_FLOAT. */
opts->x_target_flags &= ~MASK_SOFT_FLOAT; opts->x_rs6000_isa_flags &= ~OPTION_MASK_SOFT_FLOAT;
opts_set->x_target_flags |= MASK_SOFT_FLOAT; opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
opts->x_rs6000_xilinx_fpu = 1; opts->x_rs6000_xilinx_fpu = 1;
if (fpu_type == FPU_SF_LITE || fpu_type == FPU_SF_FULL) if (fpu_type == FPU_SF_LITE || fpu_type == FPU_SF_FULL)
opts->x_rs6000_single_float = 1; opts->x_rs6000_single_float = 1;
@ -272,8 +275,8 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
else else
{ {
/* -mfpu=none is equivalent to -msoft-float. */ /* -mfpu=none is equivalent to -msoft-float. */
opts->x_target_flags |= MASK_SOFT_FLOAT; opts->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
opts_set->x_target_flags |= MASK_SOFT_FLOAT; opts_set->x_rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
opts->x_rs6000_single_float = opts->x_rs6000_double_float = 0; opts->x_rs6000_single_float = opts->x_rs6000_double_float = 0;
} }
break; break;
@ -297,8 +300,4 @@ rs6000_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
#undef TARGET_OPTION_OPTIMIZATION_TABLE #undef TARGET_OPTION_OPTIMIZATION_TABLE
#define TARGET_OPTION_OPTIMIZATION_TABLE rs6000_option_optimization_table #define TARGET_OPTION_OPTIMIZATION_TABLE rs6000_option_optimization_table
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS \
(TARGET_DEFAULT)
struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;

2
gcc/config/rs6000/aix43.h
View File

@ -26,7 +26,7 @@
do { \ do { \
if (TARGET_64BIT && ! TARGET_POWERPC64) \ if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \
} \ } \
if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \ if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \

2
gcc/config/rs6000/aix51.h
View File

@ -26,7 +26,7 @@
do { \ do { \
if (TARGET_64BIT && ! TARGET_POWERPC64) \ if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \
} \ } \
if (TARGET_POWERPC64 && ! TARGET_64BIT) \ if (TARGET_POWERPC64 && ! TARGET_64BIT) \

2
gcc/config/rs6000/aix52.h
View File

@ -26,7 +26,7 @@
do { \ do { \
if (TARGET_64BIT && ! TARGET_POWERPC64) \ if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \
} \ } \
if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \ if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \

2
gcc/config/rs6000/aix53.h
View File

@ -26,7 +26,7 @@
do { \ do { \
if (TARGET_64BIT && ! TARGET_POWERPC64) \ if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \
} \ } \
if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \ if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \

2
gcc/config/rs6000/aix61.h
View File

@ -26,7 +26,7 @@
do { \ do { \
if (TARGET_64BIT && ! TARGET_POWERPC64) \ if (TARGET_64BIT && ! TARGET_POWERPC64) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \ warning (0, "-maix64 requires PowerPC64 architecture remain enabled"); \
} \ } \
if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \ if (TARGET_SOFT_FLOAT && TARGET_LONG_DOUBLE_128) \

4
gcc/config/rs6000/aix64.opt
View File

@ -20,11 +20,11 @@
; <http://www.gnu.org/licenses/>. ; <http://www.gnu.org/licenses/>.
maix64 maix64
Target Report RejectNegative Negative(maix32) Mask(64BIT) Target Report RejectNegative Negative(maix32) Mask(64BIT) Var(rs6000_isa_flags)
Compile for 64-bit pointers Compile for 64-bit pointers
maix32 maix32
Target Report RejectNegative Negative(maix64) InverseMask(64BIT) Target Report RejectNegative Negative(maix64) InverseMask(64BIT) Var(rs6000_isa_flags)
Compile for 32-bit pointers Compile for 32-bit pointers
mpe mpe

4
gcc/config/rs6000/darwin.opt
View File

@ -34,9 +34,9 @@ findirect-data
Driver RejectNegative Alias(mfix-and-continue) Driver RejectNegative Alias(mfix-and-continue)
m64 m64
Target RejectNegative Negative(m32) Mask(64BIT) Target RejectNegative Negative(m32) Mask(64BIT) Var(rs6000_isa_flags)
Generate 64-bit code Generate 64-bit code
m32 m32
Target RejectNegative Negative(m64) InverseMask(64BIT) Target RejectNegative Negative(m64) InverseMask(64BIT) Var(rs6000_isa_flags)
Generate 32-bit code Generate 32-bit code

2
gcc/config/rs6000/freebsd.h
View File

@ -72,7 +72,7 @@
-mrelocatable or -mrelocatable-lib is given. */ -mrelocatable or -mrelocatable-lib is given. */
#undef RELOCATABLE_NEEDS_FIXUP #undef RELOCATABLE_NEEDS_FIXUP
#define RELOCATABLE_NEEDS_FIXUP \ #define RELOCATABLE_NEEDS_FIXUP \
(target_flags & target_flags_explicit & MASK_RELOCATABLE) (rs6000_isa_flags & rs6000_isa_flags_explicit & OPTION_MASK_RELOCATABLE)
#define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO) #define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO)

17
gcc/config/rs6000/freebsd64.h
View File

@ -57,7 +57,7 @@ extern int dot_symbols;
-mrelocatable or -mrelocatable-lib is given. */ -mrelocatable or -mrelocatable-lib is given. */
#undef RELOCATABLE_NEEDS_FIXUP #undef RELOCATABLE_NEEDS_FIXUP
#define RELOCATABLE_NEEDS_FIXUP \ #define RELOCATABLE_NEEDS_FIXUP \
(target_flags & target_flags_explicit & MASK_RELOCATABLE) (rs6000_isa_flags & rs6000_isa_flags_explicit & OPTION_MASK_RELOCATABLE)
#undef RS6000_ABI_NAME #undef RS6000_ABI_NAME
#define RS6000_ABI_NAME "freebsd" #define RS6000_ABI_NAME "freebsd"
@ -79,14 +79,14 @@ extern int dot_symbols;
error (INVALID_64BIT, "call"); \ error (INVALID_64BIT, "call"); \
} \ } \
dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \ dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \
if (target_flags & MASK_RELOCATABLE) \ if (rs6000_isa_flags & OPTION_MASK_RELOCATABLE) \
{ \ { \
target_flags &= ~MASK_RELOCATABLE; \ rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \
error (INVALID_64BIT, "relocatable"); \ error (INVALID_64BIT, "relocatable"); \
} \ } \
if (target_flags & MASK_EABI) \ if (rs6000_isa_flags & OPTION_MASK_EABI) \
{ \ { \
target_flags &= ~MASK_EABI; \ rs6000_isa_flags &= ~OPTION_MASK_EABI; \
error (INVALID_64BIT, "eabi"); \ error (INVALID_64BIT, "eabi"); \
} \ } \
if (TARGET_PROTOTYPE) \ if (TARGET_PROTOTYPE) \
@ -94,12 +94,13 @@ extern int dot_symbols;
target_prototype = 0; \ target_prototype = 0; \
error (INVALID_64BIT, "prototype"); \ error (INVALID_64BIT, "prototype"); \
} \ } \
if ((target_flags & MASK_POWERPC64) == 0) \ if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) == 0) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
error ("-m64 requires a PowerPC64 cpu"); \ error ("-m64 requires a PowerPC64 cpu"); \
} \ } \
if ((target_flags_explicit & MASK_MINIMAL_TOC) != 0) \ if ((rs6000_isa_flags_explicit \
& OPTION_MASK_MINIMAL_TOC) != 0) \
{ \ { \
if (global_options_set.x_rs6000_current_cmodel \ if (global_options_set.x_rs6000_current_cmodel \
&& rs6000_current_cmodel != CMODEL_SMALL) \ && rs6000_current_cmodel != CMODEL_SMALL) \

2
gcc/config/rs6000/linux.h
View File

@ -109,7 +109,7 @@
-mrelocatable or -mrelocatable-lib is given. */ -mrelocatable or -mrelocatable-lib is given. */
#undef RELOCATABLE_NEEDS_FIXUP #undef RELOCATABLE_NEEDS_FIXUP
#define RELOCATABLE_NEEDS_FIXUP \ #define RELOCATABLE_NEEDS_FIXUP \
(target_flags & target_flags_explicit & MASK_RELOCATABLE) (rs6000_isa_flags & rs6000_isa_flags_explicit & OPTION_MASK_RELOCATABLE)
#define TARGET_POSIX_IO #define TARGET_POSIX_IO

33
gcc/config/rs6000/linux64.h
View File

@ -81,7 +81,7 @@ extern int dot_symbols;
-mrelocatable or -mrelocatable-lib is given. */ -mrelocatable or -mrelocatable-lib is given. */
#undef RELOCATABLE_NEEDS_FIXUP #undef RELOCATABLE_NEEDS_FIXUP
#define RELOCATABLE_NEEDS_FIXUP \ #define RELOCATABLE_NEEDS_FIXUP \
(target_flags & target_flags_explicit & MASK_RELOCATABLE) (rs6000_isa_flags & rs6000_isa_flags_explicit & OPTION_MASK_RELOCATABLE)
#undef RS6000_ABI_NAME #undef RS6000_ABI_NAME
#define RS6000_ABI_NAME "linux" #define RS6000_ABI_NAME "linux"
@ -103,14 +103,14 @@ extern int dot_symbols;
error (INVALID_64BIT, "call"); \ error (INVALID_64BIT, "call"); \
} \ } \
dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \ dot_symbols = !strcmp (rs6000_abi_name, "aixdesc"); \
if (target_flags & MASK_RELOCATABLE) \ if (rs6000_isa_flags & OPTION_MASK_RELOCATABLE) \
{ \ { \
target_flags &= ~MASK_RELOCATABLE; \ rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \
error (INVALID_64BIT, "relocatable"); \ error (INVALID_64BIT, "relocatable"); \
} \ } \
if (target_flags & MASK_EABI) \ if (rs6000_isa_flags & OPTION_MASK_EABI) \
{ \ { \
target_flags &= ~MASK_EABI; \ rs6000_isa_flags &= ~OPTION_MASK_EABI; \
error (INVALID_64BIT, "eabi"); \ error (INVALID_64BIT, "eabi"); \
} \ } \
if (TARGET_PROTOTYPE) \ if (TARGET_PROTOTYPE) \
@ -118,12 +118,13 @@ extern int dot_symbols;
target_prototype = 0; \ target_prototype = 0; \
error (INVALID_64BIT, "prototype"); \ error (INVALID_64BIT, "prototype"); \
} \ } \
if ((target_flags & MASK_POWERPC64) == 0) \ if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) == 0) \
{ \ { \
target_flags |= MASK_POWERPC64; \ rs6000_isa_flags |= OPTION_MASK_POWERPC64; \
error ("-m64 requires a PowerPC64 cpu"); \ error ("-m64 requires a PowerPC64 cpu"); \
} \ } \
if ((target_flags_explicit & MASK_MINIMAL_TOC) != 0) \ if ((rs6000_isa_flags_explicit \
& OPTION_MASK_MINIMAL_TOC) != 0) \
{ \ { \
if (global_options_set.x_rs6000_current_cmodel \ if (global_options_set.x_rs6000_current_cmodel \
&& rs6000_current_cmodel != CMODEL_SMALL) \ && rs6000_current_cmodel != CMODEL_SMALL) \
@ -213,20 +214,20 @@ extern int dot_symbols;
#ifndef RS6000_BI_ARCH #ifndef RS6000_BI_ARCH
/* 64-bit PowerPC Linux is always big-endian. */ /* 64-bit PowerPC Linux is always big-endian. */
#undef TARGET_LITTLE_ENDIAN #undef OPTION_LITTLE_ENDIAN
#define TARGET_LITTLE_ENDIAN 0 #define OPTION_LITTLE_ENDIAN 0
/* 64-bit PowerPC Linux always has a TOC. */ /* 64-bit PowerPC Linux always has a TOC. */
#undef TARGET_TOC #undef TARGET_TOC
#define TARGET_TOC 1 #define TARGET_TOC 1
/* Some things from sysv4.h we don't do when 64 bit. */ /* Some things from sysv4.h we don't do when 64 bit. */
#undef TARGET_RELOCATABLE #undef OPTION_RELOCATABLE
#define TARGET_RELOCATABLE 0 #define OPTION_RELOCATABLE 0
#undef TARGET_EABI #undef OPTION_EABI
#define TARGET_EABI 0 #define OPTION_EABI 0
#undef TARGET_PROTOTYPE #undef OPTION_PROTOTYPE
#define TARGET_PROTOTYPE 0 #define OPTION_PROTOTYPE 0
#undef RELOCATABLE_NEEDS_FIXUP #undef RELOCATABLE_NEEDS_FIXUP
#define RELOCATABLE_NEEDS_FIXUP 0 #define RELOCATABLE_NEEDS_FIXUP 0

5
gcc/config/rs6000/option-defaults.h
View File

@ -35,11 +35,12 @@
#define OPT_32 "m32" #define OPT_32 "m32"
#endif #endif
#ifndef MASK_64BIT #ifndef OPTION_MASK_64BIT
#define OPTION_MASK_64BIT 0
#define MASK_64BIT 0 #define MASK_64BIT 0
#endif #endif
#if TARGET_DEFAULT & MASK_64BIT #if TARGET_DEFAULT & OPTION_MASK_64BIT
#define OPT_ARCH64 "!"OPT_32 #define OPT_ARCH64 "!"OPT_32
#define OPT_ARCH32 OPT_32 #define OPT_ARCH32 OPT_32
#else #else

30
gcc/config/rs6000/rs6000-c.c
View File

@ -295,31 +295,31 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags,
(define_p) ? "define" : "undef", (define_p) ? "define" : "undef",
flags, bu_mask); flags, bu_mask);
/* target_flags based options. */ /* rs6000_isa_flags based options. */
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC");
if ((flags & MASK_PPC_GPOPT) != 0) if ((flags & OPTION_MASK_PPC_GPOPT) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ");
if ((flags & MASK_PPC_GFXOPT) != 0) if ((flags & OPTION_MASK_PPC_GFXOPT) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR");
if ((flags & MASK_POWERPC64) != 0) if ((flags & OPTION_MASK_POWERPC64) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64");
if ((flags & MASK_MFCRF) != 0) if ((flags & OPTION_MASK_MFCRF) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4");
if ((flags & MASK_POPCNTB) != 0) if ((flags & OPTION_MASK_POPCNTB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
if ((flags & MASK_FPRND) != 0) if ((flags & OPTION_MASK_FPRND) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
if ((flags & MASK_CMPB) != 0) if ((flags & OPTION_MASK_CMPB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
if ((flags & MASK_MFPGPR) != 0) if ((flags & OPTION_MASK_MFPGPR) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X");
if ((flags & MASK_POPCNTD) != 0) if ((flags & OPTION_MASK_POPCNTD) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7"); rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
if ((flags & MASK_SOFT_FLOAT) != 0) if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & MASK_RECIP_PRECISION) != 0) if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
rs6000_define_or_undefine_macro (define_p, "__RECIP_PRECISION__"); rs6000_define_or_undefine_macro (define_p, "__RECIP_PRECISION__");
if ((flags & MASK_ALTIVEC) != 0) if ((flags & OPTION_MASK_ALTIVEC) != 0)
{ {
const char *vec_str = (define_p) ? "__VEC__=10206" : "__VEC__"; const char *vec_str = (define_p) ? "__VEC__=10206" : "__VEC__";
rs6000_define_or_undefine_macro (define_p, "__ALTIVEC__"); rs6000_define_or_undefine_macro (define_p, "__ALTIVEC__");
@ -329,7 +329,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags,
if (!flag_iso) if (!flag_iso)
rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__"); rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__");
} }
if ((flags & MASK_VSX) != 0) if ((flags & OPTION_MASK_VSX) != 0)
rs6000_define_or_undefine_macro (define_p, "__VSX__"); rs6000_define_or_undefine_macro (define_p, "__VSX__");
/* options from the builtin masks. */ /* options from the builtin masks. */
@ -345,7 +345,7 @@ void
rs6000_cpu_cpp_builtins (cpp_reader *pfile) rs6000_cpu_cpp_builtins (cpp_reader *pfile)
{ {
/* Define all of the common macros. */ /* Define all of the common macros. */
rs6000_target_modify_macros (true, target_flags, rs6000_target_modify_macros (true, rs6000_isa_flags,
rs6000_builtin_mask_calculate ()); rs6000_builtin_mask_calculate ());
if (TARGET_FRE) if (TARGET_FRE)

51
gcc/config/rs6000/rs6000-cpus.def
View File

@ -18,6 +18,57 @@
along with GCC; see the file COPYING3. If not see along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */ <http://www.gnu.org/licenses/>. */
/* ISA masks. */
#ifndef ISA_2_1_MASKS
#define ISA_2_1_MASKS OPTION_MASK_MFCRF
#define ISA_2_2_MASKS (ISA_2_1_MASKS | OPTION_MASK_POPCNTB)
#define ISA_2_4_MASKS (ISA_2_2_MASKS | OPTION_MASK_FPRND)
/* For ISA 2.05, do not add MFPGPR, since it isn't in ISA 2.06, and don't add
ALTIVEC, since in general it isn't a win on power6. In ISA 2.04, fsel,
fre, fsqrt, etc. were no longer documented as optional. Group masks by
server and embedded. */
#define ISA_2_5_MASKS_EMBEDDED (ISA_2_2_MASKS \
| OPTION_MASK_CMPB \
| OPTION_MASK_RECIP_PRECISION \
| OPTION_MASK_PPC_GFXOPT \
| OPTION_MASK_PPC_GPOPT)
#define ISA_2_5_MASKS_SERVER (ISA_2_5_MASKS_EMBEDDED | OPTION_MASK_DFP)
/* For ISA 2.06, don't add ISEL, since in general it isn't a win, but
altivec is a win so enable it. */
#define ISA_2_6_MASKS_EMBEDDED (ISA_2_5_MASKS_EMBEDDED | OPTION_MASK_POPCNTD)
#define ISA_2_6_MASKS_SERVER (ISA_2_5_MASKS_SERVER \
| OPTION_MASK_POPCNTD \
| OPTION_MASK_ALTIVEC \
| OPTION_MASK_VSX)
#define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
| OPTION_MASK_CMPB \
| OPTION_MASK_DFP \
| OPTION_MASK_DLMZB \
| OPTION_MASK_FPRND \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
| OPTION_MASK_MFPGPR \
| OPTION_MASK_MULHW \
| OPTION_MASK_NO_UPDATE \
| OPTION_MASK_POPCNTB \
| OPTION_MASK_POPCNTD \
| OPTION_MASK_POWERPC64 \
| OPTION_MASK_PPC_GFXOPT \
| OPTION_MASK_PPC_GPOPT \
| OPTION_MASK_RECIP_PRECISION \
| OPTION_MASK_SOFT_FLOAT \
| OPTION_MASK_STRICT_ALIGN \
| OPTION_MASK_VSX)
#endif
/* This table occasionally claims that a processor does not support a /* This table occasionally claims that a processor does not support a
particular feature even though it does, but the feature is slower than the particular feature even though it does, but the feature is slower than the
alternative. Thus, it shouldn't be relied on as a complete description of alternative. Thus, it shouldn't be relied on as a complete description of

236
gcc/config/rs6000/rs6000.c
View File

@ -1121,7 +1121,8 @@ static const struct attribute_spec rs6000_attribute_table[] =
{ NULL, 0, 0, false, false, false, NULL, false } { NULL, 0, 0, false, false, false, NULL, false }
}; };
#ifndef MASK_STRICT_ALIGN #ifndef OPTION_MASK_STRICT_ALIGN
#define OPTION_MASK_STRICT_ALIGN 0
#define MASK_STRICT_ALIGN 0 #define MASK_STRICT_ALIGN 0
#endif #endif
#ifndef TARGET_PROFILE_KERNEL #ifndef TARGET_PROFILE_KERNEL
@ -1464,48 +1465,7 @@ static const struct attribute_spec rs6000_attribute_table[] =
#define TARGET_VECTORIZE_VEC_PERM_CONST_OK rs6000_vectorize_vec_perm_const_ok #define TARGET_VECTORIZE_VEC_PERM_CONST_OK rs6000_vectorize_vec_perm_const_ok
/* Simplifications for entries below. */ /* Processor table. */
enum {
POWERPC_7400_MASK = MASK_PPC_GFXOPT | MASK_ALTIVEC
};
/* Some OSs don't support saving the high part of 64-bit registers on context
switch. Other OSs don't support saving Altivec registers. On those OSs, we
don't touch the MASK_POWERPC64 or MASK_ALTIVEC settings; if the user wants
either, the user must explicitly specify them and we won't interfere with
the user's specification. */
enum {
POWERPC_MASKS = (MASK_PPC_GPOPT | MASK_STRICT_ALIGN
| MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC
| MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_MULHW
| MASK_DLMZB | MASK_CMPB | MASK_MFPGPR | MASK_DFP
| MASK_POPCNTD | MASK_VSX | MASK_ISEL | MASK_NO_UPDATE
| MASK_RECIP_PRECISION)
};
/* Masks for instructions set at various powerpc ISAs. */
enum {
ISA_2_1_MASKS = MASK_MFCRF,
ISA_2_2_MASKS = (ISA_2_1_MASKS | MASK_POPCNTB),
ISA_2_4_MASKS = (ISA_2_2_MASKS | MASK_FPRND),
/* For ISA 2.05, do not add MFPGPR, since it isn't in ISA 2.06, and don't add
ALTIVEC, since in general it isn't a win on power6. In ISA 2.04, fsel,
fre, fsqrt, etc. were no longer documented as optional. Group masks by
server and embedded. */
ISA_2_5_MASKS_EMBEDDED = (ISA_2_2_MASKS | MASK_CMPB | MASK_RECIP_PRECISION
| MASK_PPC_GFXOPT | MASK_PPC_GPOPT),
ISA_2_5_MASKS_SERVER = (ISA_2_5_MASKS_EMBEDDED | MASK_DFP),
/* For ISA 2.06, don't add ISEL, since in general it isn't a win, but
altivec is a win so enable it. */
ISA_2_6_MASKS_EMBEDDED = (ISA_2_5_MASKS_EMBEDDED | MASK_POPCNTD),
ISA_2_6_MASKS_SERVER = (ISA_2_5_MASKS_SERVER | MASK_POPCNTD | MASK_ALTIVEC
| MASK_VSX)
};
struct rs6000_ptt struct rs6000_ptt
{ {
const char *const name; /* Canonical processor name. */ const char *const name; /* Canonical processor name. */
@ -2357,21 +2317,21 @@ darwin_rs6000_override_options (void)
if (TARGET_64BIT && ! TARGET_POWERPC64) if (TARGET_64BIT && ! TARGET_POWERPC64)
{ {
target_flags |= MASK_POWERPC64; rs6000_isa_flags |= OPTION_MASK_POWERPC64;
warning (0, "-m64 requires PowerPC64 architecture, enabling"); warning (0, "-m64 requires PowerPC64 architecture, enabling");
} }
if (flag_mkernel) if (flag_mkernel)
{ {
rs6000_default_long_calls = 1; rs6000_default_long_calls = 1;
target_flags |= MASK_SOFT_FLOAT; rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
} }
/* Make -m64 imply -maltivec. Darwin's 64-bit ABI includes /* Make -m64 imply -maltivec. Darwin's 64-bit ABI includes
Altivec. */ Altivec. */
if (!flag_mkernel && !flag_apple_kext if (!flag_mkernel && !flag_apple_kext
&& TARGET_64BIT && TARGET_64BIT
&& ! (target_flags_explicit & MASK_ALTIVEC)) && ! (rs6000_isa_flags_explicit & OPTION_MASK_ALTIVEC))
target_flags |= MASK_ALTIVEC; rs6000_isa_flags |= OPTION_MASK_ALTIVEC;
/* Unless the user (not the configurer) has explicitly overridden /* Unless the user (not the configurer) has explicitly overridden
it with -mcpu=G3 or -mno-altivec, then 10.5+ targets default to it with -mcpu=G3 or -mno-altivec, then 10.5+ targets default to
@ -2379,10 +2339,10 @@ darwin_rs6000_override_options (void)
if (!flag_mkernel if (!flag_mkernel
&& !flag_apple_kext && !flag_apple_kext
&& strverscmp (darwin_macosx_version_min, "10.5") >= 0 && strverscmp (darwin_macosx_version_min, "10.5") >= 0
&& ! (target_flags_explicit & MASK_ALTIVEC) && ! (rs6000_isa_flags_explicit & OPTION_MASK_ALTIVEC)
&& ! global_options_set.x_rs6000_cpu_index) && ! global_options_set.x_rs6000_cpu_index)
{ {
target_flags |= MASK_ALTIVEC; rs6000_isa_flags |= OPTION_MASK_ALTIVEC;
} }
} }
#endif #endif
@ -2463,18 +2423,24 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_pointer_size = 32; rs6000_pointer_size = 32;
} }
set_masks = POWERPC_MASKS | MASK_SOFT_FLOAT; /* Some OSs don't support saving the high part of 64-bit registers on context
switch. Other OSs don't support saving Altivec registers. On those OSs,
we don't touch the OPTION_MASK_POWERPC64 or OPTION_MASK_ALTIVEC settings;
if the user wants either, the user must explicitly specify them and we
won't interfere with the user's specification. */
set_masks = POWERPC_MASKS;
#ifdef OS_MISSING_POWERPC64 #ifdef OS_MISSING_POWERPC64
if (OS_MISSING_POWERPC64) if (OS_MISSING_POWERPC64)
set_masks &= ~MASK_POWERPC64; set_masks &= ~OPTION_MASK_POWERPC64;
#endif #endif
#ifdef OS_MISSING_ALTIVEC #ifdef OS_MISSING_ALTIVEC
if (OS_MISSING_ALTIVEC) if (OS_MISSING_ALTIVEC)
set_masks &= ~MASK_ALTIVEC; set_masks &= ~(OPTION_MASK_ALTIVEC | OPTION_MASK_VSX);
#endif #endif
/* Don't override by the processor default if given explicitly. */ /* Don't override by the processor default if given explicitly. */
set_masks &= ~target_flags_explicit; set_masks &= ~rs6000_isa_flags_explicit;
/* Process the -mcpu=<xxx> and -mtune=<xxx> argument. If the user changed /* Process the -mcpu=<xxx> and -mtune=<xxx> argument. If the user changed
the cpu in a target attribute or pragma, but did not specify a tuning the cpu in a target attribute or pragma, but did not specify a tuning
@ -2512,13 +2478,20 @@ rs6000_option_override_internal (bool global_init_p)
TARGET_DEFAULT. */ TARGET_DEFAULT. */
if (have_cpu) if (have_cpu)
{ {
target_flags &= ~set_masks; rs6000_isa_flags &= ~set_masks;
target_flags |= (processor_target_table[cpu_index].target_enable rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& set_masks); & set_masks);
} }
else else
target_flags |= (processor_target_table[cpu_index].target_enable rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& ~target_flags_explicit); & ~rs6000_isa_flags_explicit);
/* If no -mcpu=<xxx>, inherit any default options that were cleared via
POWERPC_MASKS. Originally, TARGET_DEFAULT was used to initialize
target_flags via the TARGET_DEFAULT_TARGET_FLAGS hook. When we switched
to using rs6000_isa_flags, we need to do the initialization here. */
if (!have_cpu)
rs6000_isa_flags |= (TARGET_DEFAULT & ~rs6000_isa_flags_explicit);
if (rs6000_tune_index >= 0) if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index; tune_index = rs6000_tune_index;
@ -2603,7 +2576,8 @@ rs6000_option_override_internal (bool global_init_p)
use instructions that would be microcoded on the Cell, use the use instructions that would be microcoded on the Cell, use the
load/store multiple and string instructions. */ load/store multiple and string instructions. */
if (BYTES_BIG_ENDIAN && optimize_size && rs6000_gen_cell_microcode) if (BYTES_BIG_ENDIAN && optimize_size && rs6000_gen_cell_microcode)
target_flags |= ~target_flags_explicit & (MASK_MULTIPLE | MASK_STRING); rs6000_isa_flags |= ~rs6000_isa_flags_explicit & (OPTION_MASK_MULTIPLE
| OPTION_MASK_STRING);
/* Don't allow -mmultiple or -mstring on little endian systems /* Don't allow -mmultiple or -mstring on little endian systems
unless the cpu is a 750, because the hardware doesn't support the unless the cpu is a 750, because the hardware doesn't support the
@ -2615,15 +2589,15 @@ rs6000_option_override_internal (bool global_init_p)
{ {
if (TARGET_MULTIPLE) if (TARGET_MULTIPLE)
{ {
target_flags &= ~MASK_MULTIPLE; rs6000_isa_flags &= ~OPTION_MASK_MULTIPLE;
if ((target_flags_explicit & MASK_MULTIPLE) != 0) if ((rs6000_isa_flags_explicit & OPTION_MASK_MULTIPLE) != 0)
warning (0, "-mmultiple is not supported on little endian systems"); warning (0, "-mmultiple is not supported on little endian systems");
} }
if (TARGET_STRING) if (TARGET_STRING)
{ {
target_flags &= ~MASK_STRING; rs6000_isa_flags &= ~OPTION_MASK_STRING;
if ((target_flags_explicit & MASK_STRING) != 0) if ((rs6000_isa_flags_explicit & OPTION_MASK_STRING) != 0)
warning (0, "-mstring is not supported on little endian systems"); warning (0, "-mstring is not supported on little endian systems");
} }
} }
@ -2635,10 +2609,10 @@ rs6000_option_override_internal (bool global_init_p)
if (!TARGET_HARD_FLOAT || !TARGET_FPRS if (!TARGET_HARD_FLOAT || !TARGET_FPRS
|| !TARGET_SINGLE_FLOAT || !TARGET_DOUBLE_FLOAT) || !TARGET_SINGLE_FLOAT || !TARGET_DOUBLE_FLOAT)
{ {
if (target_flags_explicit & MASK_VSX) if (rs6000_isa_flags_explicit & OPTION_MASK_VSX)
msg = N_("-mvsx requires hardware floating point"); msg = N_("-mvsx requires hardware floating point");
else else
target_flags &= ~ MASK_VSX; rs6000_isa_flags &= ~ OPTION_MASK_VSX;
} }
else if (TARGET_PAIRED_FLOAT) else if (TARGET_PAIRED_FLOAT)
msg = N_("-mvsx and -mpaired are incompatible"); msg = N_("-mvsx and -mpaired are incompatible");
@ -2649,9 +2623,10 @@ rs6000_option_override_internal (bool global_init_p)
msg = N_("-mvsx used with little endian code"); msg = N_("-mvsx used with little endian code");
else if (TARGET_AVOID_XFORM > 0) else if (TARGET_AVOID_XFORM > 0)
msg = N_("-mvsx needs indexed addressing"); msg = N_("-mvsx needs indexed addressing");
else if (!TARGET_ALTIVEC && (target_flags_explicit & MASK_ALTIVEC)) else if (!TARGET_ALTIVEC && (rs6000_isa_flags_explicit
& OPTION_MASK_ALTIVEC))
{ {
if (target_flags_explicit & MASK_VSX) if (rs6000_isa_flags_explicit & OPTION_MASK_VSX)
msg = N_("-mvsx and -mno-altivec are incompatible"); msg = N_("-mvsx and -mno-altivec are incompatible");
else else
msg = N_("-mno-altivec disables vsx"); msg = N_("-mno-altivec disables vsx");
@ -2660,27 +2635,27 @@ rs6000_option_override_internal (bool global_init_p)
if (msg) if (msg)
{ {
warning (0, msg); warning (0, msg);
target_flags &= ~ MASK_VSX; rs6000_isa_flags &= ~ OPTION_MASK_VSX;
target_flags_explicit |= MASK_VSX; rs6000_isa_flags_explicit |= OPTION_MASK_VSX;
} }
} }
/* For the newer switches (vsx, dfp, etc.) set some of the older options, /* For the newer switches (vsx, dfp, etc.) set some of the older options,
unless the user explicitly used the -mno-<option> to disable the code. */ unless the user explicitly used the -mno-<option> to disable the code. */
if (TARGET_VSX) if (TARGET_VSX)
target_flags |= (ISA_2_6_MASKS_SERVER & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~rs6000_isa_flags_explicit);
else if (TARGET_POPCNTD) else if (TARGET_POPCNTD)
target_flags |= (ISA_2_6_MASKS_EMBEDDED & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~rs6000_isa_flags_explicit);
else if (TARGET_DFP) else if (TARGET_DFP)
target_flags |= (ISA_2_5_MASKS_SERVER & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_5_MASKS_SERVER & ~rs6000_isa_flags_explicit);
else if (TARGET_CMPB) else if (TARGET_CMPB)
target_flags |= (ISA_2_5_MASKS_EMBEDDED & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_5_MASKS_EMBEDDED & ~rs6000_isa_flags_explicit);
else if (TARGET_FPRND) else if (TARGET_FPRND)
target_flags |= (ISA_2_4_MASKS & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_4_MASKS & ~rs6000_isa_flags_explicit);
else if (TARGET_POPCNTB) else if (TARGET_POPCNTB)
target_flags |= (ISA_2_2_MASKS & ~target_flags_explicit); rs6000_isa_flags |= (ISA_2_2_MASKS & ~rs6000_isa_flags_explicit);
else if (TARGET_ALTIVEC) else if (TARGET_ALTIVEC)
target_flags |= (MASK_PPC_GFXOPT & ~target_flags_explicit); rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~rs6000_isa_flags_explicit);
/* E500mc does "better" if we inline more aggressively. Respect the /* E500mc does "better" if we inline more aggressively. Respect the
user's opinion, though. */ user's opinion, though. */
@ -2759,7 +2734,8 @@ rs6000_option_override_internal (bool global_init_p)
unless the altivec ABI was set. This is set by default for 64-bit, but unless the altivec ABI was set. This is set by default for 64-bit, but
not for 32-bit. */ not for 32-bit. */
if (main_target_opt != NULL && !main_target_opt->x_rs6000_altivec_abi) if (main_target_opt != NULL && !main_target_opt->x_rs6000_altivec_abi)
target_flags &= ~((MASK_VSX | MASK_ALTIVEC) & ~target_flags_explicit); rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC)
& ~rs6000_isa_flags_explicit);
/* Enable Altivec ABI for AIX -maltivec. */ /* Enable Altivec ABI for AIX -maltivec. */
if (TARGET_XCOFF && (TARGET_ALTIVEC || TARGET_VSX)) if (TARGET_XCOFF && (TARGET_ALTIVEC || TARGET_VSX))
@ -2837,14 +2813,14 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_single_float = TARGET_E500_SINGLE || TARGET_E500_DOUBLE; rs6000_single_float = TARGET_E500_SINGLE || TARGET_E500_DOUBLE;
rs6000_double_float = TARGET_E500_DOUBLE; rs6000_double_float = TARGET_E500_DOUBLE;
target_flags &= ~MASK_STRING; rs6000_isa_flags &= ~OPTION_MASK_STRING;
break; break;
default: default:
if (have_cpu && !(target_flags_explicit & MASK_ISEL)) if (have_cpu && !(rs6000_isa_flags_explicit & OPTION_MASK_ISEL))
target_flags &= ~MASK_ISEL; rs6000_isa_flags &= ~OPTION_MASK_ISEL;
break; break;
} }
@ -25330,7 +25306,7 @@ rs6000_darwin_file_start (void)
i = 0; i = 0;
while (mapping[i].arg != NULL while (mapping[i].arg != NULL
&& strcmp (mapping[i].arg, cpu_id) != 0 && strcmp (mapping[i].arg, cpu_id) != 0
&& (mapping[i].if_set & target_flags) == 0) && (mapping[i].if_set & rs6000_isa_flags) == 0)
i++; i++;
fprintf (asm_out_file, "\t.machine %s\n", mapping[i].name); fprintf (asm_out_file, "\t.machine %s\n", mapping[i].name);
@ -27431,48 +27407,48 @@ struct rs6000_opt_mask {
static struct rs6000_opt_mask const rs6000_opt_masks[] = static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ {
{ "altivec", MASK_ALTIVEC, false, true }, { "altivec", OPTION_MASK_ALTIVEC, false, true },
{ "cmpb", MASK_CMPB, false, true }, { "cmpb", OPTION_MASK_CMPB, false, true },
{ "dlmzb", MASK_DLMZB, false, true }, { "dlmzb", OPTION_MASK_DLMZB, false, true },
{ "fprnd", MASK_FPRND, false, true }, { "fprnd", OPTION_MASK_FPRND, false, true },
{ "hard-dfp", MASK_DFP, false, true }, { "hard-dfp", OPTION_MASK_DFP, false, true },
{ "isel", MASK_ISEL, false, true }, { "isel", OPTION_MASK_ISEL, false, true },
{ "mfcrf", MASK_MFCRF, false, true }, { "mfcrf", OPTION_MASK_MFCRF, false, true },
{ "mfpgpr", MASK_MFPGPR, false, true }, { "mfpgpr", OPTION_MASK_MFPGPR, false, true },
{ "mulhw", MASK_MULHW, false, true }, { "mulhw", OPTION_MASK_MULHW, false, true },
{ "multiple", MASK_MULTIPLE, false, true }, { "multiple", OPTION_MASK_MULTIPLE, false, true },
{ "update", MASK_NO_UPDATE, true , true }, { "update", OPTION_MASK_NO_UPDATE, true , true },
{ "popcntb", MASK_POPCNTB, false, true }, { "popcntb", OPTION_MASK_POPCNTB, false, true },
{ "popcntd", MASK_POPCNTD, false, true }, { "popcntd", OPTION_MASK_POPCNTD, false, true },
{ "powerpc-gfxopt", MASK_PPC_GFXOPT, false, true }, { "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true },
{ "powerpc-gpopt", MASK_PPC_GPOPT, false, true }, { "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true },
{ "recip-precision", MASK_RECIP_PRECISION, false, true }, { "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true },
{ "string", MASK_STRING, false, true }, { "string", OPTION_MASK_STRING, false, true },
{ "vsx", MASK_VSX, false, true }, { "vsx", OPTION_MASK_VSX, false, true },
#ifdef MASK_64BIT #ifdef OPTION_MASK_64BIT
#if TARGET_AIX_OS #if TARGET_AIX_OS
{ "aix64", MASK_64BIT, false, false }, { "aix64", OPTION_MASK_64BIT, false, false },
{ "aix32", MASK_64BIT, true, false }, { "aix32", OPTION_MASK_64BIT, true, false },
#else #else
{ "64", MASK_64BIT, false, false }, { "64", OPTION_MASK_64BIT, false, false },
{ "32", MASK_64BIT, true, false }, { "32", OPTION_MASK_64BIT, true, false },
#endif #endif
#endif #endif
#ifdef MASK_EABI #ifdef OPTION_MASK_EABI
{ "eabi", MASK_EABI, false, false }, { "eabi", OPTION_MASK_EABI, false, false },
#endif #endif
#ifdef MASK_LITTLE_ENDIAN #ifdef OPTION_MASK_LITTLE_ENDIAN
{ "little", MASK_LITTLE_ENDIAN, false, false }, { "little", OPTION_MASK_LITTLE_ENDIAN, false, false },
{ "big", MASK_LITTLE_ENDIAN, true, false }, { "big", OPTION_MASK_LITTLE_ENDIAN, true, false },
#endif #endif
#ifdef MASK_RELOCATABLE #ifdef OPTION_MASK_RELOCATABLE
{ "relocatable", MASK_RELOCATABLE, false, false }, { "relocatable", OPTION_MASK_RELOCATABLE, false, false },
#endif #endif
#ifdef MASK_STRICT_ALIGN #ifdef OPTION_MASK_STRICT_ALIGN
{ "strict-align", MASK_STRICT_ALIGN, false, false }, { "strict-align", OPTION_MASK_STRICT_ALIGN, false, false },
#endif #endif
{ "soft-float", MASK_SOFT_FLOAT, false, false }, { "soft-float", OPTION_MASK_SOFT_FLOAT, false, false },
{ "string", MASK_STRING, false, false }, { "string", OPTION_MASK_STRING, false, false },
}; };
/* Builtin mask mapping for printing the flags. */ /* Builtin mask mapping for printing the flags. */
@ -27583,20 +27559,20 @@ rs6000_inner_target_options (tree args, bool attr_p)
else else
{ {
error_p = false; error_p = false;
target_flags_explicit |= mask; rs6000_isa_flags_explicit |= mask;
/* VSX needs altivec, so -mvsx automagically sets /* VSX needs altivec, so -mvsx automagically sets
altivec. */ altivec. */
if (mask == MASK_VSX && !invert) if (mask == OPTION_MASK_VSX && !invert)
mask |= MASK_ALTIVEC; mask |= OPTION_MASK_ALTIVEC;
if (rs6000_opt_masks[i].invert) if (rs6000_opt_masks[i].invert)
invert = !invert; invert = !invert;
if (invert) if (invert)
target_flags &= ~mask; rs6000_isa_flags &= ~mask;
else else
target_flags |= mask; rs6000_isa_flags |= mask;
} }
break; break;
} }
@ -27851,14 +27827,14 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
{ {
prev_opt = TREE_TARGET_OPTION (prev_tree); prev_opt = TREE_TARGET_OPTION (prev_tree);
prev_bumask = prev_opt->x_rs6000_builtin_mask; prev_bumask = prev_opt->x_rs6000_builtin_mask;
prev_flags = prev_opt->x_target_flags; prev_flags = prev_opt->x_rs6000_isa_flags;
cur_opt = TREE_TARGET_OPTION (cur_tree); cur_opt = TREE_TARGET_OPTION (cur_tree);
cur_flags = cur_opt->x_target_flags; cur_flags = cur_opt->x_rs6000_isa_flags;
cur_bumask = cur_opt->x_rs6000_builtin_mask; cur_bumask = cur_opt->x_rs6000_builtin_mask;
diff_bumask = (prev_bumask ^ cur_bumask); diff_bumask = (prev_bumask ^ cur_bumask);
diff_flags = (prev_flags ^ cur_flags); diff_flags = (prev_flags ^ cur_flags);
if ((diff_flags != 0) || (diff_bumask != 0)) if ((diff_flags != 0) || (diff_bumask != 0))
{ {
@ -27961,7 +27937,8 @@ rs6000_set_current_function (tree fndecl)
static void static void
rs6000_function_specific_save (struct cl_target_option *ptr) rs6000_function_specific_save (struct cl_target_option *ptr)
{ {
ptr->rs6000_target_flags_explicit = target_flags_explicit; ptr->x_rs6000_isa_flags = rs6000_isa_flags;
ptr->x_rs6000_isa_flags_explicit = rs6000_isa_flags_explicit;
} }
/* Restore the current options */ /* Restore the current options */
@ -27969,7 +27946,8 @@ rs6000_function_specific_save (struct cl_target_option *ptr)
static void static void
rs6000_function_specific_restore (struct cl_target_option *ptr) rs6000_function_specific_restore (struct cl_target_option *ptr)
{ {
target_flags_explicit = ptr->rs6000_target_flags_explicit; rs6000_isa_flags = ptr->x_rs6000_isa_flags;
rs6000_isa_flags_explicit = ptr->x_rs6000_isa_flags_explicit;
(void) rs6000_option_override_internal (false); (void) rs6000_option_override_internal (false);
} }
@ -27980,10 +27958,10 @@ rs6000_function_specific_print (FILE *file, int indent,
struct cl_target_option *ptr) struct cl_target_option *ptr)
{ {
rs6000_print_isa_options (file, indent, "Isa options set", rs6000_print_isa_options (file, indent, "Isa options set",
ptr->x_target_flags); ptr->x_rs6000_isa_flags);
rs6000_print_isa_options (file, indent, "Isa options explicit", rs6000_print_isa_options (file, indent, "Isa options explicit",
ptr->rs6000_target_flags_explicit); ptr->x_rs6000_isa_flags_explicit);
} }
/* Helper function to print the current isa or misc options on a line. */ /* Helper function to print the current isa or misc options on a line. */
@ -28093,8 +28071,8 @@ rs6000_can_inline_p (tree caller, tree callee)
/* Callee's options should a subset of the caller's, i.e. a vsx function /* Callee's options should a subset of the caller's, i.e. a vsx function
can inline an altivec function but a non-vsx function can't inline a can inline an altivec function but a non-vsx function can't inline a
vsx function. */ vsx function. */
if ((caller_opts->x_target_flags & callee_opts->x_target_flags) if ((caller_opts->x_rs6000_isa_flags & callee_opts->x_rs6000_isa_flags)
== callee_opts->x_target_flags) == callee_opts->x_rs6000_isa_flags)
ret = true; ret = true;
} }

58
gcc/config/rs6000/rs6000.h
View File

@ -465,6 +465,64 @@ extern int rs6000_vector_align[];
#define TARGET_FCTIDUZ TARGET_POPCNTD #define TARGET_FCTIDUZ TARGET_POPCNTD
#define TARGET_FCTIWUZ TARGET_POPCNTD #define TARGET_FCTIWUZ TARGET_POPCNTD
/* In switching from using target_flags to using rs6000_isa_flags, the options
machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>. For now map
OPTION_MASK_<xxx> back into MASK_<xxx>. */
#define MASK_ALTIVEC OPTION_MASK_ALTIVEC
#define MASK_CMPB OPTION_MASK_CMPB
#define MASK_DFP OPTION_MASK_DFP
#define MASK_DLMZB OPTION_MASK_DLMZB
#define MASK_EABI OPTION_MASK_EABI
#define MASK_FPRND OPTION_MASK_FPRND
#define MASK_HARD_FLOAT OPTION_MASK_HARD_FLOAT
#define MASK_ISEL OPTION_MASK_ISEL
#define MASK_MFCRF OPTION_MASK_MFCRF
#define MASK_MFPGPR OPTION_MASK_MFPGPR
#define MASK_MULHW OPTION_MASK_MULHW
#define MASK_MULTIPLE OPTION_MASK_MULTIPLE
#define MASK_NO_UPDATE OPTION_MASK_NO_UPDATE
#define MASK_POPCNTB OPTION_MASK_POPCNTB
#define MASK_POPCNTD OPTION_MASK_POPCNTD
#define MASK_PPC_GFXOPT OPTION_MASK_PPC_GFXOPT
#define MASK_PPC_GPOPT OPTION_MASK_PPC_GPOPT
#define MASK_RECIP_PRECISION OPTION_MASK_RECIP_PRECISION
#define MASK_SOFT_FLOAT OPTION_MASK_SOFT_FLOAT
#define MASK_STRICT_ALIGN OPTION_MASK_STRICT_ALIGN
#define MASK_STRING OPTION_MASK_STRING
#define MASK_UPDATE OPTION_MASK_UPDATE
#define MASK_VSX OPTION_MASK_VSX
#ifndef IN_LIBGCC2
#define MASK_POWERPC64 OPTION_MASK_POWERPC64
#endif
#ifdef TARGET_64BIT
#define MASK_64BIT OPTION_MASK_64BIT
#endif
#ifdef TARGET_RELOCATABLE
#define MASK_RELOCATABLE OPTION_MASK_RELOCATABLE
#endif
#ifdef TARGET_LITTLE_ENDIAN
#define MASK_LITTLE_ENDIAN OPTION_MASK_LITTLE_ENDIAN
#endif
#ifdef TARGET_MINIMAL_TOC
#define MASK_MINIMAL_TOC OPTION_MASK_MINIMAL_TOC
#endif
#ifdef TARGET_REGNAMES
#define MASK_REGNAMES OPTION_MASK_REGNAMES
#endif
#ifdef TARGET_PROTOTYPE
#define MASK_PROTOTYPE OPTION_MASK_PROTOTYPE
#endif
/* Explicit ISA options that were set. */
#define rs6000_isa_flags_explicit global_options_set.x_rs6000_isa_flags
/* For power systems, we want to enable Altivec and VSX builtins even if the /* For power systems, we want to enable Altivec and VSX builtins even if the
user did not use -maltivec or -mvsx to allow the builtins to be used inside user did not use -maltivec or -mvsx to allow the builtins to be used inside
of #pragma GCC target or the target attribute to change the code level for a of #pragma GCC target or the target attribute to change the code level for a

61
gcc/config/rs6000/rs6000.opt
View File

@ -22,6 +22,17 @@
HeaderInclude HeaderInclude
config/rs6000/rs6000-opts.h config/rs6000/rs6000-opts.h
;; ISA flag bits (on/off)
Variable
HOST_WIDE_INT rs6000_isa_flags = TARGET_DEFAULT
TargetSave
HOST_WIDE_INT x_rs6000_isa_flags
;; Miscellaneous flag bits that were set explicitly by the user
TargetSave
HOST_WIDE_INT x_rs6000_isa_flags_explicit
;; Current processor ;; Current processor
TargetVariable TargetVariable
enum processor_type rs6000_cpu = PROCESSOR_PPC603 enum processor_type rs6000_cpu = PROCESSOR_PPC603
@ -86,80 +97,76 @@ HOST_WIDE_INT rs6000_builtin_mask
TargetVariable TargetVariable
unsigned int rs6000_debug unsigned int rs6000_debug
;; Save for target_flags_explicit
TargetSave
int rs6000_target_flags_explicit
;; This option existed in the past, but now is always on. ;; This option existed in the past, but now is always on.
mpowerpc mpowerpc
Target RejectNegative Undocumented Ignore Target RejectNegative Undocumented Ignore
mpowerpc64 mpowerpc64
Target Report Mask(POWERPC64) Target Report Mask(POWERPC64) Var(rs6000_isa_flags)
Use PowerPC-64 instruction set Use PowerPC-64 instruction set
mpowerpc-gpopt mpowerpc-gpopt
Target Report Mask(PPC_GPOPT) Save Target Report Mask(PPC_GPOPT) Var(rs6000_isa_flags)
Use PowerPC General Purpose group optional instructions Use PowerPC General Purpose group optional instructions
mpowerpc-gfxopt mpowerpc-gfxopt
Target Report Mask(PPC_GFXOPT) Save Target Report Mask(PPC_GFXOPT) Var(rs6000_isa_flags)
Use PowerPC Graphics group optional instructions Use PowerPC Graphics group optional instructions
mmfcrf mmfcrf
Target Report Mask(MFCRF) Save Target Report Mask(MFCRF) Var(rs6000_isa_flags)
Use PowerPC V2.01 single field mfcr instruction Use PowerPC V2.01 single field mfcr instruction
mpopcntb mpopcntb
Target Report Mask(POPCNTB) Save Target Report Mask(POPCNTB) Var(rs6000_isa_flags)
Use PowerPC V2.02 popcntb instruction Use PowerPC V2.02 popcntb instruction
mfprnd mfprnd
Target Report Mask(FPRND) Save Target Report Mask(FPRND) Var(rs6000_isa_flags)
Use PowerPC V2.02 floating point rounding instructions Use PowerPC V2.02 floating point rounding instructions
mcmpb mcmpb
Target Report Mask(CMPB) Save Target Report Mask(CMPB) Var(rs6000_isa_flags)
Use PowerPC V2.05 compare bytes instruction Use PowerPC V2.05 compare bytes instruction
mmfpgpr mmfpgpr
Target Report Mask(MFPGPR) Save Target Report Mask(MFPGPR) Var(rs6000_isa_flags)
Use extended PowerPC V2.05 move floating point to/from GPR instructions Use extended PowerPC V2.05 move floating point to/from GPR instructions
maltivec maltivec
Target Report Mask(ALTIVEC) Save Target Report Mask(ALTIVEC) Var(rs6000_isa_flags)
Use AltiVec instructions Use AltiVec instructions
mhard-dfp mhard-dfp
Target Report Mask(DFP) Save Target Report Mask(DFP) Var(rs6000_isa_flags)
Use decimal floating point instructions Use decimal floating point instructions
mmulhw mmulhw
Target Report Mask(MULHW) Save Target Report Mask(MULHW) Var(rs6000_isa_flags)
Use 4xx half-word multiply instructions Use 4xx half-word multiply instructions
mdlmzb mdlmzb
Target Report Mask(DLMZB) Save Target Report Mask(DLMZB) Var(rs6000_isa_flags)
Use 4xx string-search dlmzb instruction Use 4xx string-search dlmzb instruction
mmultiple mmultiple
Target Report Mask(MULTIPLE) Save Target Report Mask(MULTIPLE) Var(rs6000_isa_flags)
Generate load/store multiple instructions Generate load/store multiple instructions
mstring mstring
Target Report Mask(STRING) Save Target Report Mask(STRING) Var(rs6000_isa_flags)
Generate string instructions for block moves Generate string instructions for block moves
msoft-float msoft-float
Target Report RejectNegative Mask(SOFT_FLOAT) Target Report RejectNegative Mask(SOFT_FLOAT) Var(rs6000_isa_flags)
Do not use hardware floating point Do not use hardware floating point
mhard-float mhard-float
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) Var(rs6000_isa_flags)
Use hardware floating point Use hardware floating point
mpopcntd mpopcntd
Target Report Mask(POPCNTD) Save Target Report Mask(POPCNTD) Var(rs6000_isa_flags)
Use PowerPC V2.06 popcntd instruction Use PowerPC V2.06 popcntd instruction
mfriz mfriz
@ -171,7 +178,7 @@ Target RejectNegative Joined Var(rs6000_veclibabi_name)
Vector library ABI to use Vector library ABI to use
mvsx mvsx
Target Report Mask(VSX) Save Target Report Mask(VSX) Var(rs6000_isa_flags)
Use vector/scalar (VSX) instructions Use vector/scalar (VSX) instructions
mvsx-scalar-double mvsx-scalar-double
@ -211,11 +218,11 @@ Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1)
; Explicitly control whether we vectorize the builtins or not. ; Explicitly control whether we vectorize the builtins or not.
mno-update mno-update
Target Report RejectNegative Mask(NO_UPDATE) Save Target Report RejectNegative Mask(NO_UPDATE) Var(rs6000_isa_flags)
Do not generate load/store with update instructions Do not generate load/store with update instructions
mupdate mupdate
Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Var(rs6000_isa_flags)
Generate load/store with update instructions Generate load/store with update instructions
msingle-pic-base msingle-pic-base
@ -258,7 +265,7 @@ Target Report RejectNegative Joined Var(rs6000_recip_name)
Generate software reciprocal divide and square root for better throughput. Generate software reciprocal divide and square root for better throughput.
mrecip-precision mrecip-precision
Target Report Mask(RECIP_PRECISION) Save Target Report Mask(RECIP_PRECISION) Var(rs6000_isa_flags)
Assume that the reciprocal estimate instructions provide more accuracy. Assume that the reciprocal estimate instructions provide more accuracy.
mno-fp-in-toc mno-fp-in-toc
@ -285,7 +292,7 @@ Place symbol+offset constants in TOC
; This is at the cost of having 2 extra loads and one extra store per ; This is at the cost of having 2 extra loads and one extra store per
; function, and one less allocable register. ; function, and one less allocable register.
mminimal-toc mminimal-toc
Target Report Mask(MINIMAL_TOC) Target Report Mask(MINIMAL_TOC) Var(rs6000_isa_flags)
Use only one TOC entry per procedure Use only one TOC entry per procedure
mfull-toc mfull-toc
@ -309,7 +316,7 @@ Target Report Var(rs6000_block_move_inline_limit) Init(0) RejectNegative Joined
Specify how many bytes should be moved inline before calling out to memcpy/memmove Specify how many bytes should be moved inline before calling out to memcpy/memmove
misel misel
Target Report Mask(ISEL) Save Target Report Mask(ISEL) Var(rs6000_isa_flags)
Generate isel instructions Generate isel instructions
misel=no misel=no

31
gcc/config/rs6000/sysv4.h
View File

@ -40,9 +40,10 @@
#undef ASM_DEFAULT_SPEC #undef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC "-mppc" #define ASM_DEFAULT_SPEC "-mppc"
#define TARGET_TOC ((target_flags & MASK_64BIT) \ #define TARGET_TOC ((rs6000_isa_flags & OPTION_MASK_64BIT) \
|| ((target_flags & (MASK_RELOCATABLE \ || ((rs6000_isa_flags \
| MASK_MINIMAL_TOC)) \ & (OPTION_MASK_RELOCATABLE \
| OPTION_MASK_MINIMAL_TOC)) \
&& flag_pic > 1) \ && flag_pic > 1) \
|| DEFAULT_ABI == ABI_AIX) || DEFAULT_ABI == ABI_AIX)
@ -77,13 +78,13 @@ do { \
else if (!strcmp (rs6000_abi_name, "sysv-noeabi")) \ else if (!strcmp (rs6000_abi_name, "sysv-noeabi")) \
{ \ { \
rs6000_current_abi = ABI_V4; \ rs6000_current_abi = ABI_V4; \
target_flags &= ~ MASK_EABI; \ rs6000_isa_flags &= ~ OPTION_MASK_EABI; \
} \ } \
else if (!strcmp (rs6000_abi_name, "sysv-eabi") \ else if (!strcmp (rs6000_abi_name, "sysv-eabi") \
|| !strcmp (rs6000_abi_name, "eabi")) \ || !strcmp (rs6000_abi_name, "eabi")) \
{ \ { \
rs6000_current_abi = ABI_V4; \ rs6000_current_abi = ABI_V4; \
target_flags |= MASK_EABI; \ rs6000_isa_flags |= OPTION_MASK_EABI; \
} \ } \
else if (!strcmp (rs6000_abi_name, "aixdesc")) \ else if (!strcmp (rs6000_abi_name, "aixdesc")) \
rs6000_current_abi = ABI_AIX; \ rs6000_current_abi = ABI_AIX; \
@ -102,8 +103,8 @@ do { \
else if (!strcmp (rs6000_abi_name, "i960-old")) \ else if (!strcmp (rs6000_abi_name, "i960-old")) \
{ \ { \
rs6000_current_abi = ABI_V4; \ rs6000_current_abi = ABI_V4; \
target_flags |= (MASK_LITTLE_ENDIAN | MASK_EABI); \ rs6000_isa_flags |= (OPTION_MASK_LITTLE_ENDIAN | OPTION_MASK_EABI); \
target_flags &= ~MASK_STRICT_ALIGN; \ rs6000_isa_flags &= ~OPTION_MASK_STRICT_ALIGN; \
TARGET_NO_BITFIELD_WORD = 1; \ TARGET_NO_BITFIELD_WORD = 1; \
} \ } \
else \ else \
@ -168,13 +169,13 @@ do { \
\ \
if (TARGET_RELOCATABLE && !TARGET_MINIMAL_TOC) \ if (TARGET_RELOCATABLE && !TARGET_MINIMAL_TOC) \
{ \ { \
target_flags |= MASK_MINIMAL_TOC; \ rs6000_isa_flags |= OPTION_MASK_MINIMAL_TOC; \
error ("-mrelocatable and -mno-minimal-toc are incompatible"); \ error ("-mrelocatable and -mno-minimal-toc are incompatible"); \
} \ } \
\ \
if (TARGET_RELOCATABLE && rs6000_current_abi == ABI_AIX) \ if (TARGET_RELOCATABLE && rs6000_current_abi == ABI_AIX) \
{ \ { \
target_flags &= ~MASK_RELOCATABLE; \ rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE; \
error ("-mrelocatable and -mcall-%s are incompatible", \ error ("-mrelocatable and -mcall-%s are incompatible", \
rs6000_abi_name); \ rs6000_abi_name); \
} \ } \
@ -188,7 +189,7 @@ do { \
\ \
if (rs6000_current_abi == ABI_AIX && TARGET_LITTLE_ENDIAN) \ if (rs6000_current_abi == ABI_AIX && TARGET_LITTLE_ENDIAN) \
{ \ { \
target_flags &= ~MASK_LITTLE_ENDIAN; \ rs6000_isa_flags &= ~OPTION_MASK_LITTLE_ENDIAN; \
error ("-mcall-aixdesc must be big endian"); \ error ("-mcall-aixdesc must be big endian"); \
} \ } \
\ \
@ -200,7 +201,7 @@ do { \
/* Treat -fPIC the same as -mrelocatable. */ \ /* Treat -fPIC the same as -mrelocatable. */ \
if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \ if (flag_pic > 1 && DEFAULT_ABI != ABI_AIX) \
{ \ { \
target_flags |= MASK_RELOCATABLE | MASK_MINIMAL_TOC; \ rs6000_isa_flags |= OPTION_MASK_RELOCATABLE | OPTION_MASK_MINIMAL_TOC; \
TARGET_NO_FP_IN_TOC = 1; \ TARGET_NO_FP_IN_TOC = 1; \
} \ } \
\ \
@ -212,9 +213,9 @@ do { \
#ifndef RS6000_BI_ARCH #ifndef RS6000_BI_ARCH
# define SUBSUBTARGET_OVERRIDE_OPTIONS \ # define SUBSUBTARGET_OVERRIDE_OPTIONS \
do { \ do { \
if ((TARGET_DEFAULT ^ target_flags) & MASK_64BIT) \ if ((TARGET_DEFAULT ^ rs6000_isa_flags) & OPTION_MASK_64BIT) \
error ("-m%s not supported in this configuration", \ error ("-m%s not supported in this configuration", \
(target_flags & MASK_64BIT) ? "64" : "32"); \ (rs6000_isa_flags & OPTION_MASK_64BIT) ? "64" : "32"); \
} while (0) } while (0)
#endif #endif
@ -500,8 +501,8 @@ extern int fixuplabelno;
#define TARGET_OS_SYSV_CPP_BUILTINS() \ #define TARGET_OS_SYSV_CPP_BUILTINS() \
do \ do \
{ \ { \
if (target_flags_explicit \ if (rs6000_isa_flags_explicit \
& MASK_RELOCATABLE) \ & OPTION_MASK_RELOCATABLE) \
builtin_define ("_RELOCATABLE"); \ builtin_define ("_RELOCATABLE"); \
} \ } \
while (0) while (0)

18
gcc/config/rs6000/sysv4.opt
View File

@ -49,12 +49,12 @@ Target Report Var(TARGET_NO_BITFIELD_TYPE) Save
Align to the base type of the bit-field Align to the base type of the bit-field
mstrict-align mstrict-align
Target Report Mask(STRICT_ALIGN) Target Report Mask(STRICT_ALIGN) Var(rs6000_isa_flags)
Align to the base type of the bit-field Align to the base type of the bit-field
Don't assume that unaligned accesses are handled by the system Don't assume that unaligned accesses are handled by the system
mrelocatable mrelocatable
Target Report Mask(RELOCATABLE) Target Report Mask(RELOCATABLE) Var(rs6000_isa_flags)
Produce code relocatable at runtime Produce code relocatable at runtime
mrelocatable-lib mrelocatable-lib
@ -62,19 +62,19 @@ Target
Produce code relocatable at runtime Produce code relocatable at runtime
mlittle-endian mlittle-endian
Target Report RejectNegative Mask(LITTLE_ENDIAN) Target Report RejectNegative Mask(LITTLE_ENDIAN) Var(rs6000_isa_flags)
Produce little endian code Produce little endian code
mlittle mlittle
Target Report RejectNegative Mask(LITTLE_ENDIAN) Target Report RejectNegative Mask(LITTLE_ENDIAN) Var(rs6000_isa_flags)
Produce little endian code Produce little endian code
mbig-endian mbig-endian
Target Report RejectNegative InverseMask(LITTLE_ENDIAN) Target Report RejectNegative InverseMask(LITTLE_ENDIAN) Var(rs6000_isa_flags)
Produce big endian code Produce big endian code
mbig mbig
Target Report RejectNegative InverseMask(LITTLE_ENDIAN) Target Report RejectNegative InverseMask(LITTLE_ENDIAN) Var(rs6000_isa_flags)
Produce big endian code Produce big endian code
;; FIXME: This does nothing. What should be done? ;; FIXME: This does nothing. What should be done?
@ -96,7 +96,7 @@ Target RejectNegative
no description yet no description yet
meabi meabi
Target Report Mask(EABI) Target Report Mask(EABI) Var(rs6000_isa_flags)
Use EABI Use EABI
mbit-word mbit-word
@ -138,11 +138,11 @@ Target RejectNegative
no description yet no description yet
m64 m64
Target Report RejectNegative Negative(m32) Mask(64BIT) Target Report RejectNegative Negative(m32) Mask(64BIT) Var(rs6000_isa_flags)
Generate 64-bit code Generate 64-bit code
m32 m32
Target Report RejectNegative Negative(m64) InverseMask(64BIT) Target Report RejectNegative Negative(m64) InverseMask(64BIT) Var(rs6000_isa_flags)
Generate 32-bit code Generate 32-bit code
mnewlib mnewlib

3
gcc/config/rs6000/t-rs6000
View File

@ -26,7 +26,8 @@ rs6000.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
$(OBSTACK_H) $(TREE_H) $(EXPR_H) $(OPTABS_H) except.h function.h \ $(OBSTACK_H) $(TREE_H) $(EXPR_H) $(OPTABS_H) except.h function.h \
output.h dbxout.h $(BASIC_BLOCK_H) toplev.h $(GGC_H) $(HASHTAB_H) \ output.h dbxout.h $(BASIC_BLOCK_H) toplev.h $(GGC_H) $(HASHTAB_H) \
$(TM_P_H) $(TARGET_H) $(TARGET_DEF_H) langhooks.h reload.h gt-rs6000.h \ $(TM_P_H) $(TARGET_H) $(TARGET_DEF_H) langhooks.h reload.h gt-rs6000.h \
cfgloop.h $(OPTS_H) $(COMMON_TARGET_H) dumpfile.h cfgloop.h $(OPTS_H) $(COMMON_TARGET_H) dumpfile.h \
$(srcdir)/config/rs6000/rs6000-cpus.def
rs6000-c.o: $(srcdir)/config/rs6000/rs6000-c.c \ rs6000-c.o: $(srcdir)/config/rs6000/rs6000-c.c \
$(srcdir)/config/rs6000/rs6000-protos.h \ $(srcdir)/config/rs6000/rs6000-protos.h \