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[ARM 3/5 big.LITTLE] Add support for -mcpu=cortex-a15.cortex-a7

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2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm-cores.def (cortex-a15.cortex-a7): New.
	* doc/invoke.texi: Document -mcpu=cortex-a15.cortex-a7.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/bpabi.h
	(BE8_LINK_SPEC): Handle -mcpu=cortex-a5.cortex-a7.

From-SVN: r206047
This commit is contained in:
James Greenhalgh 2013-12-17 12:27:38 +00:00 committed by James Greenhalgh
parent c0e25e6593
commit 4afb594c57
6 changed files with 22 additions and 1 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2013-12-17 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm-cores.def (cortex-a15.cortex-a7): New.
* doc/invoke.texi: Document -mcpu=cortex-a15.cortex-a7.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h
(BE8_LINK_SPEC): Handle -mcpu=cortex-a5.cortex-a7.
2013-12-17 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm-cores.def: Add new column for TUNE_IDENT.

3
gcc/config/arm/arm-cores.def
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@ -148,5 +148,8 @@ ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m)
ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m)
ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e)
/* V7 big.LITTLE implementations */
ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
/* V8 Architecture Processors */
ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED, cortex_a53)

3
gcc/config/arm/arm-tables.opt
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@ -282,6 +282,9 @@ Enum(processor_type) String(cortex-m3) Value(cortexm3)
EnumValue
Enum(processor_type) String(marvell-pj4) Value(marvell_pj4)
EnumValue
Enum(processor_type) String(cortex-a15.cortex-a7) Value(cortexa15cortexa7)
EnumValue
Enum(processor_type) String(cortex-a53) Value(cortexa53)

3
gcc/config/arm/arm-tune.md
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@ -29,5 +29,6 @@
cortexa8,cortexa9,cortexa12,
cortexa15,cortexr4,cortexr4f,
cortexr5,cortexr7,cortexm4,
cortexm3,marvell_pj4,cortexa53"
cortexm3,marvell_pj4,cortexa15cortexa7,
cortexa53"
(const (symbol_ref "((enum attr_tune) arm_tune)")))

2
gcc/config/arm/bpabi.h
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@ -60,6 +60,7 @@
|mcpu=cortex-a7 \
|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
|mcpu=cortex-a12 \
|mcpu=cortex-a15.cortex-a7 \
|mcpu=marvell-pj4 \
|mcpu=cortex-a53 \
|mcpu=generic-armv7-a \
@ -74,6 +75,7 @@
|mcpu=cortex-a7 \
|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
|mcpu=cortex-a12 \
|mcpu=cortex-a15.cortex-a7 \
|mcpu=cortex-a53 \
|mcpu=marvell-pj4 \
|mcpu=generic-armv7-a \

3
gcc/doc/invoke.texi
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@ -12168,6 +12168,9 @@ assembly code. Permissible names are: @samp{arm2}, @samp{arm250},
@samp{fa526}, @samp{fa626},
@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
Additionally, this option can specify that GCC should tune the performance
of the code for a big.LITTLE system. The only permissible name is:
@samp{cortex-a15.cortex-a7}.
@option{-mcpu=generic-@var{arch}} is also permissible, and is
equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}.