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(negtf2,abstf2): Fix v9 case.

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From-SVN: r12578
This commit is contained in:
Doug Evans 1996-07-31 19:04:55 +00:00
parent a24d629d1c
commit 49a7ec10f7
1 changed files with 14 additions and 12 deletions
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26
gcc/config/sparc/sparc.md
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@ -4769,20 +4769,21 @@
(define_insn "negtf2" (define_insn "negtf2"
[(set (match_operand:TF 0 "register_operand" "=e,e") [(set (match_operand:TF 0 "register_operand" "=e,e")
(neg:TF (match_operand:TF 1 "register_operand" "0,e")))] (neg:TF (match_operand:TF 1 "register_operand" "0,e")))]
; We don't use quad float insns here so we don't need TARGET_HARD_QUAD.
"TARGET_FPU" "TARGET_FPU"
"* "*
{ {
if (TARGET_V9) /* v9: can't use fnegs, won't work with upper regs. */
return \"fnegd %1,%0\"; /* Can't use fnegs, won't work with upper regs. */ if (which_alternative == 0)
else if (which_alternative == 0) return TARGET_V9 ? \"fnegd %0,%0\" : \"fnegs %0,%0\";
return \"fnegs %0,%0\";
else else
return \"fnegs %1,%0\;fmovs %R1,%R0\;fmovs %S1,%S0\;fmovs %T1,%T0\"; return TARGET_V9 ? \"fnegd %1,%0\;fmovd %S1,%S0\"
: \"fnegs %1,%0\;fmovs %R1,%R0\;fmovs %S1,%S0\;fmovs %T1,%T0\";
}" }"
[(set_attr "type" "fp") [(set_attr "type" "fp")
(set_attr_alternative "length" (set_attr_alternative "length"
[(const_int 1) [(const_int 1)
(if_then_else (eq_attr "isa" "v9") (const_int 1) (const_int 4))])]) (if_then_else (eq_attr "isa" "v9") (const_int 2) (const_int 4))])])
(define_insn "negdf2" (define_insn "negdf2"
[(set (match_operand:DF 0 "register_operand" "=e,e") [(set (match_operand:DF 0 "register_operand" "=e,e")
@ -4812,20 +4813,21 @@
(define_insn "abstf2" (define_insn "abstf2"
[(set (match_operand:TF 0 "register_operand" "=e,e") [(set (match_operand:TF 0 "register_operand" "=e,e")
(abs:TF (match_operand:TF 1 "register_operand" "0,e")))] (abs:TF (match_operand:TF 1 "register_operand" "0,e")))]
; We don't use quad float insns here so we don't need TARGET_HARD_QUAD.
"TARGET_FPU" "TARGET_FPU"
"* "*
{ {
if (TARGET_V9) /* v9: can't use fabss, won't work with upper regs. */
return \"fabsd %1,%0\"; /* Can't use fabss, won't work with upper regs. */ if (which_alternative == 0)
else if (which_alternative == 0) return TARGET_V9 ? \"fabsd %0,%0\" : \"fabss %0,%0\";
return \"fabss %0,%0\";
else else
return \"fabss %1,%0\;fmovs %R1,%R0\;fmovs %S1,%S0\;fmovs %T1,%T0\"; return TARGET_V9 ? \"fabsd %1,%0\;fmovd %S1,%S0\"
: \"fabss %1,%0\;fmovs %R1,%R0\;fmovs %S1,%S0\;fmovs %T1,%T0\";
}" }"
[(set_attr "type" "fp") [(set_attr "type" "fp")
(set_attr_alternative "length" (set_attr_alternative "length"
[(const_int 1) [(const_int 1)
(if_then_else (eq_attr "isa" "v9") (const_int 1) (const_int 4))])]) (if_then_else (eq_attr "isa" "v9") (const_int 2) (const_int 4))])])
(define_insn "absdf2" (define_insn "absdf2"
[(set (match_operand:DF 0 "register_operand" "=e,e") [(set (match_operand:DF 0 "register_operand" "=e,e")