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Fix vector-compare-1 regressions on sh4/sh4eb caused by pattern clobbering T reg without expressing that in its RTL.
PR rtl-optimization/90275 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the pattern.
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@ -8395,9 +8395,15 @@
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;; Store (negated) T bit as all zeros or ones in a reg.
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;; subc Rn,Rn ! Rn = Rn - Rn - T; T = T
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;; not Rn,Rn ! Rn = 0 - Rn
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;;
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;; Note the call to sh_split_treg_set_expr may clobber
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;; the T reg. We must express this, even though it's
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;; not immediately obvious this pattern changes the
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;; T register.
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(define_insn_and_split "mov_neg_si_t"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(neg:SI (match_operand 1 "treg_set_expr")))]
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(neg:SI (match_operand 1 "treg_set_expr")))
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(clobber (reg:SI T_REG))]
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"TARGET_SH1"
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{
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gcc_assert (t_reg_operand (operands[1], VOIDmode));
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