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s390.c (s390_expand_atomic): New function.
2005-12-07 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.c (s390_expand_atomic): New function.
Adjust comment of helper functions.
* config/s390/s390-protos.h (s390_expand_atomic): Declare.
* config/s390/s390.md ("ATOMIC"): New code macro.
("atomic"): Corresponding new code attribute.
("sync_lock_test_and_set[hq]i",
"sync_{new_,old_,}{and,ior,xor,add,sub,nand}[hq]i"): New pattern.
From-SVN: r108180
This commit is contained in:
Adrian Straetling
Ulrich Weigand
parent
3093f076e1
commit
45d18331f6
@ -1,3 +1,13 @@
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2005-12-07 Adrian Straetling <straetling@de.ibm.com>
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* config/s390/s390.c (s390_expand_atomic): New function.
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Adjust comment of helper functions.
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* config/s390/s390-protos.h (s390_expand_atomic): Declare.
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* config/s390/s390.md ("ATOMIC"): New code macro.
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("atomic"): Corresponding new code attribute.
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("sync_lock_test_and_set[hq]i",
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"sync_{new_,old_,}{and,ior,xor,add,sub,nand}[hq]i"): New pattern.
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2005-12-07 Adrian Straetling <straetling@de.ibm.com>
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* config/s390/s390.c (s390_expand_mask_and_shift,
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@ -76,6 +76,8 @@ extern void s390_expand_cmpmem (rtx, rtx, rtx, rtx);
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extern bool s390_expand_addcc (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
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extern bool s390_expand_insv (rtx, rtx, rtx, rtx);
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extern void s390_expand_cs_hqi (enum machine_mode, rtx, rtx, rtx, rtx);
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extern void s390_expand_atomic (enum machine_mode, enum rtx_code,
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rtx, rtx, rtx, bool);
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extern rtx s390_return_addr_rtx (int, rtx);
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extern rtx s390_back_chain_rtx (void);
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extern rtx s390_emit_call (rtx, rtx, rtx, rtx);
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@ -3972,8 +3972,8 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src)
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return false;
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}
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/* A subroutine of s390_expand_cs_hqi which returns a register which holds VAL
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of mode MODE shifted by COUNT bits. */
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/* A subroutine of s390_expand_cs_hqi and s390_expand_atomic which returns a
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register that holds VAL of mode MODE shifted by COUNT bits. */
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static inline rtx
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s390_expand_mask_and_shift (rtx val, enum machine_mode mode, rtx count)
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@ -3996,10 +3996,10 @@ struct alignment_context
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bool aligned; /* True if memory is aliged, false else. */
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};
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/* A subroutine of s390_expand_cs_hqi to initialize the structure AC for
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transparent simplifying, if the memory alignment is known to be at least
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32bit. MEM is the memory location for the actual operation and MODE its
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mode. */
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/* A subroutine of s390_expand_cs_hqi and s390_expand_atomic to initialize
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structure AC for transparent simplifying, if the memory alignment is known
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to be at least 32bit. MEM is the memory location for the actual operation
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and MODE its mode. */
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static void
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init_alignment_context (struct alignment_context *ac, rtx mem,
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@ -4122,6 +4122,97 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx target, rtx mem, rtx cmp, rtx ne
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NULL_RTX, 1, OPTAB_DIRECT), 1);
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}
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/* Expand an atomic operation CODE of mode MODE. MEM is the memory location
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and VAL the value to play with. If AFTER is true then store the the value
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MEM holds after the operation, if AFTER is false then store the value MEM
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holds before the operation. If TARGET is zero then discard that value, else
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store it to TARGET. */
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void
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s390_expand_atomic (enum machine_mode mode, enum rtx_code code,
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rtx target, rtx mem, rtx val, bool after)
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{
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struct alignment_context ac;
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rtx cmp;
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rtx new = gen_reg_rtx (SImode);
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rtx orig = gen_reg_rtx (SImode);
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rtx csloop = gen_label_rtx ();
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gcc_assert (!target || register_operand (target, VOIDmode));
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gcc_assert (MEM_P (mem));
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init_alignment_context (&ac, mem, mode);
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/* Shift val to the correct bit positions.
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Preserve "icm", but prevent "ex icm". */
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if (!(ac.aligned && code == SET && MEM_P (val)))
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val = s390_expand_mask_and_shift (val, mode, ac.shift);
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/* Further preparation insns. */
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if (code == PLUS || code == MINUS)
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emit_move_insn (orig, val);
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else if (code == MULT || code == AND) /* val = "11..1<val>11..1" */
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val = expand_simple_binop (SImode, XOR, val, ac.modemaski,
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NULL_RTX, 1, OPTAB_DIRECT);
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/* Load full word. Subsequent loads are performed by CS. */
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cmp = force_reg (SImode, ac.memsi);
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/* Start CS loop. */
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emit_label (csloop);
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emit_move_insn (new, cmp);
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/* Patch new with val at correct position. */
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switch (code)
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{
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case PLUS:
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case MINUS:
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val = expand_simple_binop (SImode, code, new, orig,
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NULL_RTX, 1, OPTAB_DIRECT);
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val = expand_simple_binop (SImode, AND, val, ac.modemask,
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NULL_RTX, 1, OPTAB_DIRECT);
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/* FALLTHRU */
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case SET:
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if (ac.aligned && MEM_P (val))
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store_bit_field (new, GET_MODE_BITSIZE (mode), 0, SImode, val);
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else
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{
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new = expand_simple_binop (SImode, AND, new, ac.modemaski,
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NULL_RTX, 1, OPTAB_DIRECT);
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new = expand_simple_binop (SImode, IOR, new, val,
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NULL_RTX, 1, OPTAB_DIRECT);
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}
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break;
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case AND:
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case IOR:
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case XOR:
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new = expand_simple_binop (SImode, code, new, val,
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NULL_RTX, 1, OPTAB_DIRECT);
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break;
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case MULT: /* NAND */
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new = expand_simple_binop (SImode, XOR, new, ac.modemask,
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NULL_RTX, 1, OPTAB_DIRECT);
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new = expand_simple_binop (SImode, AND, new, val,
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NULL_RTX, 1, OPTAB_DIRECT);
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break;
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default:
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gcc_unreachable ();
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}
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/* Emit compare_and_swap pattern. */
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emit_insn (gen_sync_compare_and_swap_ccsi (cmp, ac.memsi, cmp, new));
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/* Loop until swapped (unlikely?). */
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s390_emit_jump (csloop, gen_rtx_fmt_ee (NE, CCZ1mode,
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gen_rtx_REG (CCZ1mode, CC_REGNUM),
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const0_rtx));
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/* Return the correct part of the bitfield. */
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if (target)
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convert_move (target, expand_simple_binop (SImode, LSHIFTRT,
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after ? new : cmp, ac.shift,
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NULL_RTX, 1, OPTAB_DIRECT), 1);
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}
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/* This is called from dwarf2out.c via TARGET_ASM_OUTPUT_DWARF_DTPREL.
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We need to emit DTP-relative relocations. */
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@ -315,6 +315,11 @@
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;; the same template.
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(define_code_macro SHIFT [ashift lshiftrt])
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;; These macros allow to combine most atomic operations.
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(define_code_macro ATOMIC [and ior xor plus minus mult])
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(define_code_attr atomic [(and "and") (ior "ior") (xor "xor")
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(plus "add") (minus "sub") (mult "nand")])
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;; In FPR templates, a string like "lt<de>br" will expand to "ltdbr" in DFmode
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;; and "ltebr" in SFmode.
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@ -7340,6 +7345,45 @@
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(set_attr "type" "sem")])
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;
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; Other atomic instruction patterns.
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;
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(define_expand "sync_lock_test_and_set<mode>"
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[(match_operand:HQI 0 "register_operand")
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(match_operand:HQI 1 "memory_operand")
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(match_operand:HQI 2 "general_operand")]
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""
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"s390_expand_atomic (<MODE>mode, SET, operands[0], operands[1],
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operands[2], false); DONE;")
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(define_expand "sync_<atomic><mode>"
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[(set (match_operand:HQI 0 "memory_operand")
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(ATOMIC:HQI (match_dup 0)
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(match_operand:HQI 1 "general_operand")))]
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""
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"s390_expand_atomic (<MODE>mode, <CODE>, NULL_RTX, operands[0],
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operands[1], false); DONE;")
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(define_expand "sync_old_<atomic><mode>"
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[(set (match_operand:HQI 0 "register_operand")
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(match_operand:HQI 1 "memory_operand"))
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(set (match_dup 1)
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(ATOMIC:HQI (match_dup 1)
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(match_operand:HQI 2 "general_operand")))]
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""
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"s390_expand_atomic (<MODE>mode, <CODE>, operands[0], operands[1],
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operands[2], false); DONE;")
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(define_expand "sync_new_<atomic><mode>"
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[(set (match_operand:HQI 0 "register_operand")
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(ATOMIC:HQI (match_operand:HQI 1 "memory_operand")
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(match_operand:HQI 2 "general_operand")))
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(set (match_dup 1) (ATOMIC:HQI (match_dup 1) (match_dup 2)))]
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""
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"s390_expand_atomic (<MODE>mode, <CODE>, operands[0], operands[1],
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operands[2], true); DONE;")
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;;
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;;- Miscellaneous instructions.
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;;
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