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s390.md: Add comments with the instructions emitted by an insn pattern if macros are used.
2006-04-19 Andreas Krebbel <krebbel1@de.ibm.com> * config/s390/s390.md: Add comments with the instructions emitted by an insn pattern if macros are used. From-SVN: r113071
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@ -1,3 +1,8 @@
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2006-04-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/s390.md: Add comments with the instructions emitted
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by an insn pattern if macros are used.
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2006-04-19 Alan Modra <amodra@bigpond.net.au>
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PR rtl-optimization/26026
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@ -467,6 +467,7 @@
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"ltgfr\t%2,%0"
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[(set_attr "op_type" "RRE")])
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; ltr, lt, ltgr, ltg
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(define_insn "*tst<mode>_extimm"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
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@ -479,6 +480,7 @@
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lt<g>\t%2,%0"
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[(set_attr "op_type" "RR<E>,RXY")])
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; ltr, lt, ltgr, ltg
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(define_insn "*tst<mode>_cconly_extimm"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
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@ -534,6 +536,7 @@
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[(set_attr "op_type" "RS")
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(set_attr "atype" "reg")])
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; ltr, ltgr
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(define_insn "*tst<mode>_cconly2"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 0 "register_operand" "d")
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@ -656,6 +659,7 @@
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chy\t%0,%1"
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[(set_attr "op_type" "RX,RXY")])
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; cr, chi, cfi, c, cy, cgr, cghi, cgfi, cg
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(define_insn "*cmp<mode>_ccs"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 0 "register_operand" "d,d,d,d,d")
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@ -774,6 +778,7 @@
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; (DF|SF) instructions
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; ltxbr, ltdbr, ltebr
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(define_insn "*cmp<mode>_ccs_0"
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[(set (reg CC_REGNUM)
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(compare (match_operand:FPR 0 "register_operand" "f")
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@ -783,6 +788,7 @@
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[(set_attr "op_type" "RRE")
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(set_attr "type" "fsimp<mode>")])
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; ltxr, ltdr, lter
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(define_insn "*cmp<mode>_ccs_0_ibm"
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[(set (reg CC_REGNUM)
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(compare (match_operand:FPR 0 "register_operand" "f")
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@ -792,6 +798,7 @@
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[(set_attr "op_type" "<RRe>")
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(set_attr "type" "fsimp<mode>")])
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; cxbr, cdbr, cebr, cxb, cdb, ceb
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(define_insn "*cmp<mode>_ccs"
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[(set (reg CC_REGNUM)
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(compare (match_operand:FPR 0 "register_operand" "f,f")
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@ -803,6 +810,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; cxr, cdr, cer, cx, cd, ce
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(define_insn "*cmp<mode>_ccs_ibm"
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[(set (reg CC_REGNUM)
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(compare (match_operand:FPR 0 "register_operand" "f,f")
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@ -2860,6 +2868,7 @@
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; extendqi(si|di)2 instruction pattern(s).
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;
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; lbr, lgbr, lb, lgb
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(define_insn "*extendqi<mode>2_extimm"
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[(set (match_operand:GPR 0 "register_operand" "=d,d")
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(sign_extend:GPR (match_operand:QI 1 "nonimmediate_operand" "d,m")))]
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@ -2869,6 +2878,7 @@
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l<g>b\t%0,%1"
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[(set_attr "op_type" "RRE,RXY")])
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; lb, lgb
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(define_insn "*extendqi<mode>2"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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(sign_extend:GPR (match_operand:QI 1 "memory_operand" "m")))]
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@ -3020,6 +3030,7 @@
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}
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})
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; llhr, llcr, llghr, llgcr, llh, llc, llgh, llgc
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(define_insn "*zero_extend<HQI:mode><GPR:mode>2_extimm"
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[(set (match_operand:GPR 0 "register_operand" "=d,d")
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(zero_extend:GPR (match_operand:HQI 1 "nonimmediate_operand" "d,m")))]
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@ -3029,6 +3040,7 @@
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ll<g><hc>\t%0,%1"
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[(set_attr "op_type" "RRE,RXY")])
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; llgh, llgc
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(define_insn "*zero_extend<HQI:mode><GPR:mode>2"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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(zero_extend:GPR (match_operand:HQI 1 "memory_operand" "m")))]
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@ -3136,6 +3148,7 @@
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DONE;
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})
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; cgxbr, cgdbr, cgebr, cfxbr, cfdbr, cfebr
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(define_insn "fix_trunc<FPR:mode><GPR:mode>2_ieee"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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(fix:GPR (match_operand:FPR 1 "register_operand" "f")))
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@ -3234,6 +3247,7 @@
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; float(si|di)(tf|df|sf)2 instruction pattern(s).
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;
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; cxgbr, cdgbr, cegbr
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(define_insn "floatdi<mode>2"
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[(set (match_operand:FPR 0 "register_operand" "=f")
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(float:FPR (match_operand:DI 1 "register_operand" "d")))]
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@ -3242,6 +3256,7 @@
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[(set_attr "op_type" "RRE")
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(set_attr "type" "itof" )])
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; cxfbr, cdfbr, cefbr
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(define_insn "floatsi<mode>2_ieee"
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[(set (match_operand:FPR 0 "register_operand" "=f")
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(float:FPR (match_operand:SI 1 "register_operand" "d")))]
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@ -3682,6 +3697,7 @@
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; add(di|si)3 instruction pattern(s).
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;
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; ar, ahi, alfi, slfi, a, ay, agr, aghi, algfi, slgfi, ag
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(define_insn "*add<mode>3"
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[(set (match_operand:GPR 0 "register_operand" "=d,d,d,d,d,d")
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(plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0,0")
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@ -3697,6 +3713,7 @@
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a<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RI,RIL,RIL,RX<Y>,RXY")])
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; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
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(define_insn "*add<mode>3_carry1_cc"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
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@ -3713,6 +3730,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
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; alr, al, aly, algr, alg
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(define_insn "*add<mode>3_carry1_cconly"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
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@ -3726,6 +3744,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
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(define_insn "*add<mode>3_carry2_cc"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
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@ -3742,6 +3761,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
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; alr, al, aly, algr, alg
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(define_insn "*add<mode>3_carry2_cconly"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
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@ -3755,6 +3775,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
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(define_insn "*add<mode>3_cc"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
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@ -3771,6 +3792,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
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; alr, al, aly, algr, alg
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(define_insn "*add<mode>3_cconly"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
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@ -3784,6 +3806,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; alr, al, aly, algr, alg
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(define_insn "*add<mode>3_cconly2"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
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@ -3796,6 +3819,7 @@
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al<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; ahi, afi, aghi, agfi
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(define_insn "*add<mode>3_imm_cc"
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[(set (reg CC_REGNUM)
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(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
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@ -3825,6 +3849,7 @@
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"TARGET_HARD_FLOAT"
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"")
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; axbr, adbr, aebr, axb, adb, aeb
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(define_insn "*add<mode>3"
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[(set (match_operand:FPR 0 "register_operand" "=f,f")
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(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
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@ -3837,6 +3862,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; axbr, adbr, aebr, axb, adb, aeb
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(define_insn "*add<mode>3_cc"
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[(set (reg CC_REGNUM)
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(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
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@ -3851,6 +3877,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; axbr, adbr, aebr, axb, adb, aeb
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(define_insn "*add<mode>3_cconly"
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[(set (reg CC_REGNUM)
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(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
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@ -3864,6 +3891,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; axr, adr, aer, ax, ad, ae
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(define_insn "*add<mode>3_ibm"
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[(set (match_operand:FPR 0 "register_operand" "=f,f")
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(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
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@ -4053,6 +4081,7 @@
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; sub(di|si)3 instruction pattern(s).
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;
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; sr, s, sy, sgr, sg
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(define_insn "*sub<mode>3"
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[(set (match_operand:GPR 0 "register_operand" "=d,d,d")
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(minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4065,6 +4094,7 @@
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s<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_borrow_cc"
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[(set (reg CC_REGNUM)
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(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4079,6 +4109,7 @@
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sl<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_borrow_cconly"
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[(set (reg CC_REGNUM)
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(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4092,6 +4123,7 @@
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sl<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_cc"
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[(set (reg CC_REGNUM)
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(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4106,6 +4138,7 @@
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sl<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_cc2"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4119,6 +4152,7 @@
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sl<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_cconly"
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[(set (reg CC_REGNUM)
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(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4132,6 +4166,7 @@
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sl<y>\t%0,%2"
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[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
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; slr, sl, sly, slgr, slg
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(define_insn "*sub<mode>3_cconly2"
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[(set (reg CC_REGNUM)
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(compare (match_operand:GPR 1 "register_operand" "0,0,0")
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@ -4157,6 +4192,7 @@
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"TARGET_HARD_FLOAT"
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"")
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; sxbr, sdbr, sebr, sxb, sdb, seb
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(define_insn "*sub<mode>3"
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[(set (match_operand:FPR 0 "register_operand" "=f,f")
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(minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
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@ -4169,6 +4205,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; sxbr, sdbr, sebr, sxb, sdb, seb
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(define_insn "*sub<mode>3_cc"
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[(set (reg CC_REGNUM)
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(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
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@ -4183,6 +4220,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; sxbr, sdbr, sebr, sxb, sdb, seb
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(define_insn "*sub<mode>3_cconly"
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[(set (reg CC_REGNUM)
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(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
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@ -4196,6 +4234,7 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimp<mode>")])
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; sxr, sdr, ser, sx, sd, se
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(define_insn "*sub<mode>3_ibm"
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[(set (match_operand:FPR 0 "register_operand" "=f,f")
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(minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
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@ -4217,6 +4256,7 @@
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; add(di|si)cc instruction pattern(s).
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;
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; alcr, alc, alcgr, alcg
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(define_insn "*add<mode>3_alc_cc"
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[(set (reg CC_REGNUM)
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(compare
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@ -4232,6 +4272,7 @@
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alc<g>\t%0,%2"
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[(set_attr "op_type" "RRE,RXY")])
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; alcr, alc, alcgr, alcg
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(define_insn "*add<mode>3_alc"
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[(set (match_operand:GPR 0 "register_operand" "=d,d")
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(plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
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@ -4244,6 +4285,7 @@
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alc<g>\t%0,%2"
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[(set_attr "op_type" "RRE,RXY")])
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; slbr, slb, slbgr, slbg
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(define_insn "*sub<mode>3_slb_cc"
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[(set (reg CC_REGNUM)
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(compare
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@ -4259,6 +4301,7 @@
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slb<g>\t%0,%2"
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[(set_attr "op_type" "RRE,RXY")])
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; slbr, slb, slbgr, slbg
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(define_insn "*sub<mode>3_slb"
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[(set (match_operand:GPR 0 "register_operand" "=d,d")
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(minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
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@ -4457,6 +4500,7 @@
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"TARGET_HARD_FLOAT"
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"")
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; mxbr mdbr, meebr, mxb, mxb, meeb
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(define_insn "*mul<mode>3"
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[(set (match_operand:FPR 0 "register_operand" "=f,f")
|
||||
(mult:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
|
||||
@ -4468,6 +4512,7 @@
|
||||
[(set_attr "op_type" "RRE,RXE")
|
||||
(set_attr "type" "fmul<mode>")])
|
||||
|
||||
; mxr, mdr, mer, mx, md, me
|
||||
(define_insn "*mul<mode>3_ibm"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f,f")
|
||||
(mult:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
|
||||
@ -4479,6 +4524,7 @@
|
||||
[(set_attr "op_type" "<RRe>,<RXe>")
|
||||
(set_attr "type" "fmul<mode>")])
|
||||
|
||||
; maxbr, madbr, maebr, maxb, madb, maeb
|
||||
(define_insn "*fmadd<mode>"
|
||||
[(set (match_operand:DSF 0 "register_operand" "=f,f")
|
||||
(plus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "%f,f")
|
||||
@ -4491,6 +4537,7 @@
|
||||
[(set_attr "op_type" "RRE,RXE")
|
||||
(set_attr "type" "fmul<mode>")])
|
||||
|
||||
; msxbr, msdbr, msebr, msxb, msdb, mseb
|
||||
(define_insn "*fmsub<mode>"
|
||||
[(set (match_operand:DSF 0 "register_operand" "=f,f")
|
||||
(minus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "f,f")
|
||||
@ -4950,6 +4997,7 @@
|
||||
"TARGET_HARD_FLOAT"
|
||||
"")
|
||||
|
||||
; dxbr, ddbr, debr, dxb, ddb, deb
|
||||
(define_insn "*div<mode>3"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f,f")
|
||||
(div:FPR (match_operand:FPR 1 "register_operand" "0,0")
|
||||
@ -4961,6 +5009,7 @@
|
||||
[(set_attr "op_type" "RRE,RXE")
|
||||
(set_attr "type" "fdiv<mode>")])
|
||||
|
||||
; dxr, ddr, der, dx, dd, de
|
||||
(define_insn "*div<mode>3_ibm"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f,f")
|
||||
(div:FPR (match_operand:FPR 1 "register_operand" "0,0")
|
||||
@ -5878,6 +5927,7 @@
|
||||
"lcgfr\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")])
|
||||
|
||||
; lcr, lcgr
|
||||
(define_insn "*neg<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
|
||||
@ -5887,7 +5937,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"lc<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lcr, lcgr
|
||||
(define_insn "*neg<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
|
||||
@ -5896,7 +5947,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"lc<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lcr, lcgr
|
||||
(define_insn "*neg<mode>2"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(neg:GPR (match_operand:GPR 1 "register_operand" "d")))
|
||||
@ -5945,6 +5997,7 @@
|
||||
"TARGET_HARD_FLOAT"
|
||||
"")
|
||||
|
||||
; lcxbr, lcdbr, lcebr
|
||||
(define_insn "*neg<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
|
||||
@ -5955,7 +6008,8 @@
|
||||
"lc<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lcxbr, lcdbr, lcebr
|
||||
(define_insn "*neg<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
|
||||
@ -5965,7 +6019,8 @@
|
||||
"lc<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lcxbr, lcdbr, lcebr
|
||||
(define_insn "*neg<mode>2"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f")
|
||||
(neg:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -5975,6 +6030,7 @@
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
; lcxr, lcdr, lcer
|
||||
(define_insn "*neg<mode>2_ibm"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f")
|
||||
(neg:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -6013,6 +6069,7 @@
|
||||
"lpgfr\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")])
|
||||
|
||||
; lpr, lpgr
|
||||
(define_insn "*abs<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (abs:GPR (match_operand:DI 1 "register_operand" "d"))
|
||||
@ -6022,7 +6079,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"lp<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lpr, lpgr
|
||||
(define_insn "*abs<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (abs:GPR (match_operand:GPR 1 "register_operand" "d"))
|
||||
@ -6031,7 +6089,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"lp<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lpr, lpgr
|
||||
(define_insn "abs<mode>2"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(abs:GPR (match_operand:GPR 1 "register_operand" "d")))
|
||||
@ -6052,6 +6111,7 @@
|
||||
"TARGET_HARD_FLOAT"
|
||||
"")
|
||||
|
||||
; lpxbr, lpdbr, lpebr
|
||||
(define_insn "*abs<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
|
||||
@ -6062,7 +6122,8 @@
|
||||
"lp<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lpxbr, lpdbr, lpebr
|
||||
(define_insn "*abs<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
|
||||
@ -6072,7 +6133,8 @@
|
||||
"lp<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lpxbr, lpdbr, lpebr
|
||||
(define_insn "*abs<mode>2"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f")
|
||||
(abs:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -6082,6 +6144,7 @@
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
; lpxr, lpdr, lper
|
||||
(define_insn "*abs<mode>2_ibm"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f")
|
||||
(abs:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -6120,6 +6183,7 @@
|
||||
"lngfr\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")])
|
||||
|
||||
; lnr, lngr
|
||||
(define_insn "*negabs<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
|
||||
@ -6129,7 +6193,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"ln<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lnr, lngr
|
||||
(define_insn "*negabs<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
|
||||
@ -6138,7 +6203,8 @@
|
||||
"s390_match_ccmode (insn, CCAmode)"
|
||||
"ln<g>r\t%0,%1"
|
||||
[(set_attr "op_type" "RR<E>")])
|
||||
|
||||
|
||||
; lnr, lngr
|
||||
(define_insn "*negabs<mode>2"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))))
|
||||
@ -6151,6 +6217,7 @@
|
||||
; Floating point
|
||||
;
|
||||
|
||||
; lnxbr, lndbr, lnebr
|
||||
(define_insn "*negabs<mode>2_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -6161,7 +6228,8 @@
|
||||
"ln<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lnxbr, lndbr, lnebr
|
||||
(define_insn "*negabs<mode>2_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
|
||||
@ -6171,7 +6239,8 @@
|
||||
"ln<xde>br\t%0,%1"
|
||||
[(set_attr "op_type" "RRE")
|
||||
(set_attr "type" "fsimp<mode>")])
|
||||
|
||||
|
||||
; lnxbr, lndbr, lnebr
|
||||
(define_insn "*negabs<mode>2"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f")
|
||||
(neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f"))))
|
||||
@ -6189,6 +6258,7 @@
|
||||
; sqrt(df|sf)2 instruction pattern(s).
|
||||
;
|
||||
|
||||
; sqxbr, sqdbr, sqebr, sqxb, sqdb, sqeb
|
||||
(define_insn "sqrt<mode>2"
|
||||
[(set (match_operand:FPR 0 "register_operand" "=f,f")
|
||||
(sqrt:FPR (match_operand:FPR 1 "general_operand" "f,<Rf>")))]
|
||||
@ -6269,6 +6339,7 @@
|
||||
; rotl(di|si)3 instruction pattern(s).
|
||||
;
|
||||
|
||||
; rll, rllg
|
||||
(define_insn "rotl<mode>3"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(rotate:GPR (match_operand:GPR 1 "register_operand" "d")
|
||||
@ -6278,6 +6349,7 @@
|
||||
[(set_attr "op_type" "RSE")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; rll, rllg
|
||||
(define_insn "*rotl<mode>3_and"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(rotate:GPR (match_operand:GPR 1 "register_operand" "d")
|
||||
@ -6304,6 +6376,7 @@
|
||||
""
|
||||
"")
|
||||
|
||||
; sldl, srdl
|
||||
(define_insn "*<shift>di3_31"
|
||||
[(set (match_operand:DI 0 "register_operand" "=d")
|
||||
(SHIFT:DI (match_operand:DI 1 "register_operand" "0")
|
||||
@ -6313,6 +6386,7 @@
|
||||
[(set_attr "op_type" "RS")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sll, srl, sllg, srlg
|
||||
(define_insn "*<shift><mode>3"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(SHIFT:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6322,6 +6396,7 @@
|
||||
[(set_attr "op_type" "RS<E>")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sldl, srdl
|
||||
(define_insn "*<shift>di3_31_and"
|
||||
[(set (match_operand:DI 0 "register_operand" "=d")
|
||||
(SHIFT:DI (match_operand:DI 1 "register_operand" "0")
|
||||
@ -6332,6 +6407,7 @@
|
||||
[(set_attr "op_type" "RS")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sll, srl, sllg, srlg
|
||||
(define_insn "*<shift><mode>3_and"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(SHIFT:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6388,6 +6464,7 @@
|
||||
[(set_attr "op_type" "RS")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3_cc"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6400,6 +6477,7 @@
|
||||
[(set_attr "op_type" "RS<E>")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3_cconly"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6411,6 +6489,7 @@
|
||||
[(set_attr "op_type" "RS<E>")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6462,6 +6541,7 @@
|
||||
[(set_attr "op_type" "RS")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3_cc_and"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6475,6 +6555,7 @@
|
||||
[(set_attr "op_type" "RS<E>")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3_cconly_and"
|
||||
[(set (reg CC_REGNUM)
|
||||
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -6487,6 +6568,7 @@
|
||||
[(set_attr "op_type" "RS<E>")
|
||||
(set_attr "atype" "reg")])
|
||||
|
||||
; sra, srag
|
||||
(define_insn "*ashr<mode>3_and"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=d")
|
||||
(ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
|
||||
@ -7376,6 +7458,7 @@
|
||||
s390_compare_emitted = operands[4];
|
||||
})
|
||||
|
||||
; cds, cdsg
|
||||
(define_insn "*sync_compare_and_swap<mode>"
|
||||
[(set (match_operand:DP 0 "register_operand" "=r")
|
||||
(match_operand:DP 1 "memory_operand" "+Q"))
|
||||
@ -7392,6 +7475,7 @@
|
||||
[(set_attr "op_type" "RS<TE>")
|
||||
(set_attr "type" "sem")])
|
||||
|
||||
; cs, csg
|
||||
(define_insn "*sync_compare_and_swap<mode>"
|
||||
[(set (match_operand:GPR 0 "register_operand" "=r")
|
||||
(match_operand:GPR 1 "memory_operand" "+Q"))
|
||||
|
Loading…
x
Reference in New Issue
Block a user