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* config/mips/mips.h (TARGET_*): Boolify.
From-SVN: r84601
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@ -1,3 +1,7 @@
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2004-07-13 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.h (TARGET_*): Boolify.
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2004-07-12 James E Wilson <wilson@specifixinc.com>
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* Makefile.in (AR): Use @AR@ not ar.
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@ -182,82 +182,83 @@ extern const struct mips_cpu_info *mips_tune_info;
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#define MASK_MIPS_TFILE 0 /* flag for mips-tfile usage */
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/* r4000 64 bit sizes */
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#define TARGET_INT64 (target_flags & MASK_INT64)
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#define TARGET_LONG64 (target_flags & MASK_LONG64)
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#define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
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#define TARGET_64BIT (target_flags & MASK_64BIT)
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#define TARGET_INT64 ((target_flags & MASK_INT64) != 0)
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#define TARGET_LONG64 ((target_flags & MASK_LONG64) != 0)
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#define TARGET_FLOAT64 ((target_flags & MASK_FLOAT64) != 0)
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#define TARGET_64BIT ((target_flags & MASK_64BIT) != 0)
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/* Mips vs. GNU linker */
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#define TARGET_SPLIT_ADDRESSES (target_flags & MASK_SPLIT_ADDR)
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#define TARGET_SPLIT_ADDRESSES ((target_flags & MASK_SPLIT_ADDR) != 0)
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/* Mips vs. GNU assembler */
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#define TARGET_GAS (target_flags & MASK_GAS)
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#define TARGET_GAS ((target_flags & MASK_GAS) != 0)
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#define TARGET_MIPS_AS (!TARGET_GAS)
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/* Debug Modes */
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#define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
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#define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
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#define TARGET_DEBUG_MODE ((target_flags & MASK_DEBUG) != 0)
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#define TARGET_DEBUG_D_MODE ((target_flags & MASK_DEBUG_D) != 0)
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/* Reg. Naming in .s ($21 vs. $a0) */
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#define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
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#define TARGET_NAME_REGS ((target_flags & MASK_NAME_REGS) != 0)
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/* call memcpy instead of inline code */
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#define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
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#define TARGET_MEMCPY ((target_flags & MASK_MEMCPY) != 0)
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/* .abicalls, etc from Pyramid V.4 */
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#define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
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#define TARGET_XGOT (target_flags & MASK_XGOT)
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#define TARGET_ABICALLS ((target_flags & MASK_ABICALLS) != 0)
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#define TARGET_XGOT ((target_flags & MASK_XGOT) != 0)
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/* software floating point */
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#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
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#define TARGET_SOFT_FLOAT ((target_flags & MASK_SOFT_FLOAT) != 0)
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#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
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/* always call through a register */
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#define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
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#define TARGET_LONG_CALLS ((target_flags & MASK_LONG_CALLS) != 0)
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/* for embedded systems, optimize for
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reduced RAM space instead of for
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fastest code. */
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#define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
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#define TARGET_EMBEDDED_DATA ((target_flags & MASK_EMBEDDED_DATA) != 0)
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/* always store uninitialized const
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variables in rodata, requires
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TARGET_EMBEDDED_DATA. */
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#define TARGET_UNINIT_CONST_IN_RODATA (target_flags & MASK_UNINIT_CONST_IN_RODATA)
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#define TARGET_UNINIT_CONST_IN_RODATA \
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((target_flags & MASK_UNINIT_CONST_IN_RODATA) != 0)
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/* generate big endian code. */
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#define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
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#define TARGET_BIG_ENDIAN ((target_flags & MASK_BIG_ENDIAN) != 0)
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#define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT)
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#define TARGET_SINGLE_FLOAT ((target_flags & MASK_SINGLE_FLOAT) != 0)
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#define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT)
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#define TARGET_MAD (target_flags & MASK_MAD)
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#define TARGET_MAD ((target_flags & MASK_MAD) != 0)
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#define TARGET_FUSED_MADD (! (target_flags & MASK_NO_FUSED_MADD))
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#define TARGET_FUSED_MADD ((target_flags & MASK_NO_FUSED_MADD) == 0)
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#define TARGET_4300_MUL_FIX (target_flags & MASK_4300_MUL_FIX)
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#define TARGET_4300_MUL_FIX ((target_flags & MASK_4300_MUL_FIX) != 0)
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#define TARGET_CHECK_ZERO_DIV (!(target_flags & MASK_NO_CHECK_ZERO_DIV))
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#define TARGET_CHECK_ZERO_DIV ((target_flags & MASK_NO_CHECK_ZERO_DIV) == 0)
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#define TARGET_BRANCHLIKELY (target_flags & MASK_BRANCHLIKELY)
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#define TARGET_BRANCHLIKELY ((target_flags & MASK_BRANCHLIKELY) != 0)
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#define TARGET_FIX_SB1 (target_flags & MASK_FIX_SB1)
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#define TARGET_FIX_SB1 ((target_flags & MASK_FIX_SB1) != 0)
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/* Work around R4000 errata. */
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#define TARGET_FIX_R4000 (target_flags & MASK_FIX_R4000)
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#define TARGET_FIX_R4000 ((target_flags & MASK_FIX_R4000) != 0)
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/* Work around R4400 errata. */
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#define TARGET_FIX_R4400 (target_flags & MASK_FIX_R4400)
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#define TARGET_FIX_VR4120 (target_flags & MASK_FIX_VR4120)
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#define TARGET_VR4130_ALIGN (target_flags & MASK_VR4130_ALIGN)
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#define TARGET_FIX_R4400 ((target_flags & MASK_FIX_R4400) != 0)
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#define TARGET_FIX_VR4120 ((target_flags & MASK_FIX_VR4120) != 0)
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#define TARGET_VR4130_ALIGN ((target_flags & MASK_VR4130_ALIGN) != 0)
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#define TARGET_FP_EXCEPTIONS (target_flags & MASK_FP_EXCEPTIONS)
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#define TARGET_FP_EXCEPTIONS ((target_flags & MASK_FP_EXCEPTIONS) != 0)
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/* True if we should use NewABI-style relocation operators for
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symbolic addresses. This is never true for mips16 code,
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which has its own conventions. */
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#define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
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#define TARGET_EXPLICIT_RELOCS ((target_flags & MASK_EXPLICIT_RELOCS) != 0)
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/* True if the call patterns should be split into a jalr followed by
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@ -303,7 +304,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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#define TARGET_GPWORD (TARGET_ABICALLS && !(TARGET_NEWABI && TARGET_IRIX))
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/* Generate mips16 code */
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#define TARGET_MIPS16 (target_flags & MASK_MIPS16)
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#define TARGET_MIPS16 ((target_flags & MASK_MIPS16) != 0)
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/* Generic ISA defines. */
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#define ISA_MIPS1 (mips_isa == 1)
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