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re PR rtl-optimization/21163 (internal compiler error: in output_constant_pool_2, at varasm.c:3135)

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PR rtl-opt/21163
        * simplify-rtx.c (simplify_binary_operation) <IOR>: Check
        for SCALAR_INT_MODE_P instead of not MODE_CC before returning
        constm1_rtx.
        <AND, LSHIFTRT, UMIN>: Use CONST0_RTX.
        <UDIV, UMOD>: Use CONST0_RTX and CONST1_RTX.
        <DIV, MOD>: Likewise.

From-SVN: r98678
This commit is contained in:
Richard Henderson 2005-04-24 15:16:48 -07:00 committed by Richard Henderson
parent 98a3dad411
commit 3f2960d5a5
2 changed files with 71 additions and 49 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2005-04-24 Richard Henderson <rth@redhat.com>
PR rtl-opt/21163
* simplify-rtx.c (simplify_binary_operation) <IOR>: Check
for SCALAR_INT_MODE_P instead of not MODE_CC before returning
constm1_rtx.
<AND, LSHIFTRT, UMIN>: Use CONST0_RTX.
<UDIV, UMOD>: Use CONST0_RTX and CONST1_RTX.
<DIV, MOD>: Likewise.
2005-04-24 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* collect2.c (main): Unlock the stdio streams.

110
gcc/simplify-rtx.c
View File

@ -1624,7 +1624,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
|| (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
&& ! side_effects_p (op0)
&& GET_MODE_CLASS (mode) != MODE_CC)
&& SCALAR_INT_MODE_P (mode))
return constm1_rtx;
tem = simplify_associative_operation (code, mode, op0, op1);
if (tem)
@ -1665,8 +1665,8 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
break;
case AND:
if (trueop1 == const0_rtx && ! side_effects_p (op0))
return const0_rtx;
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1;
/* If we are turning off bits already known off in OP0, we need
not do an AND. */
if (GET_CODE (trueop1) == CONST_INT
@ -1681,7 +1681,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
|| (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
&& ! side_effects_p (op0)
&& GET_MODE_CLASS (mode) != MODE_CC)
return const0_rtx;
return CONST0_RTX (mode);
/* Transform (and (extend X) C) into (zero_extend (and X C)) if
there are no nonzero bits of C outside of X's mode. */
@ -1752,18 +1752,20 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
case UDIV:
/* 0/x is 0 (or x&0 if x has side-effects). */
if (trueop0 == const0_rtx)
return side_effects_p (op1)
? simplify_gen_binary (AND, mode, op1, const0_rtx)
: const0_rtx;
/* x/1 is x. */
if (trueop1 == const1_rtx)
return rtl_hooks.gen_lowpart_no_emit (mode, op0);
/* Convert divide by power of two into shift. */
if (GET_CODE (trueop1) == CONST_INT
&& (val = exact_log2 (INTVAL (trueop1))) > 0)
return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (val));
break;
if (trueop0 == CONST0_RTX (mode))
{
if (side_effects_p (op1))
return simplify_gen_binary (AND, mode, op1, trueop0);
return trueop0;
}
/* x/1 is x. */
if (trueop1 == CONST1_RTX (mode))
return rtl_hooks.gen_lowpart_no_emit (mode, op0);
/* Convert divide by power of two into shift. */
if (GET_CODE (trueop1) == CONST_INT
&& (val = exact_log2 (INTVAL (trueop1))) > 0)
return simplify_gen_binary (LSHIFTRT, mode, op0, GEN_INT (val));
break;
case DIV:
/* Handle floating point and integers separately. */
@ -1808,12 +1810,14 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
else
{
/* 0/x is 0 (or x&0 if x has side-effects). */
if (trueop0 == const0_rtx)
return side_effects_p (op1)
? simplify_gen_binary (AND, mode, op1, const0_rtx)
: const0_rtx;
if (trueop0 == CONST0_RTX (mode))
{
if (side_effects_p (op1))
return simplify_gen_binary (AND, mode, op1, trueop0);
return trueop0;
}
/* x/1 is x. */
if (trueop1 == const1_rtx)
if (trueop1 == CONST1_RTX (mode))
return rtl_hooks.gen_lowpart_no_emit (mode, op0);
/* x/-1 is -x. */
if (trueop1 == constm1_rtx)
@ -1826,34 +1830,42 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
case UMOD:
/* 0%x is 0 (or x&0 if x has side-effects). */
if (trueop0 == const0_rtx)
return side_effects_p (op1)
? simplify_gen_binary (AND, mode, op1, const0_rtx)
: const0_rtx;
/* x%1 is 0 (of x&0 if x has side-effects). */
if (trueop1 == const1_rtx)
return side_effects_p (op0)
? simplify_gen_binary (AND, mode, op0, const0_rtx)
: const0_rtx;
/* Implement modulus by power of two as AND. */
if (GET_CODE (trueop1) == CONST_INT
&& exact_log2 (INTVAL (trueop1)) > 0)
return simplify_gen_binary (AND, mode, op0,
GEN_INT (INTVAL (op1) - 1));
break;
if (trueop0 == CONST0_RTX (mode))
{
if (side_effects_p (op1))
return simplify_gen_binary (AND, mode, op1, trueop0);
return trueop0;
}
/* x%1 is 0 (of x&0 if x has side-effects). */
if (trueop1 == CONST1_RTX (mode))
{
if (side_effects_p (op0))
return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
return CONST0_RTX (mode);
}
/* Implement modulus by power of two as AND. */
if (GET_CODE (trueop1) == CONST_INT
&& exact_log2 (INTVAL (trueop1)) > 0)
return simplify_gen_binary (AND, mode, op0,
GEN_INT (INTVAL (op1) - 1));
break;
case MOD:
/* 0%x is 0 (or x&0 if x has side-effects). */
if (trueop0 == const0_rtx)
return side_effects_p (op1)
? simplify_gen_binary (AND, mode, op1, const0_rtx)
: const0_rtx;
/* x%1 and x%-1 is 0 (or x&0 if x has side-effects). */
if (trueop1 == const1_rtx || trueop1 == constm1_rtx)
return side_effects_p (op0)
? simplify_gen_binary (AND, mode, op0, const0_rtx)
: const0_rtx;
break;
if (trueop0 == CONST0_RTX (mode))
{
if (side_effects_p (op1))
return simplify_gen_binary (AND, mode, op1, trueop0);
return trueop0;
}
/* x%1 and x%-1 is 0 (or x&0 if x has side-effects). */
if (trueop1 == CONST1_RTX (mode) || trueop1 == constm1_rtx)
{
if (side_effects_p (op0))
return simplify_gen_binary (AND, mode, op0, CONST0_RTX (mode));
return CONST0_RTX (mode);
}
break;
case ROTATERT:
case ROTATE:
@ -1868,9 +1880,9 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
case ASHIFT:
case LSHIFTRT:
if (trueop1 == const0_rtx)
if (trueop1 == CONST0_RTX (mode))
return op0;
if (trueop0 == const0_rtx && ! side_effects_p (op1))
if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
return op0;
break;
@ -1902,7 +1914,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
break;
case UMIN:
if (trueop1 == const0_rtx && ! side_effects_p (op0))
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return op1;
if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;