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Fix incorrect filling of delay slots in branchy code at -O2
The issue is that relax_delay_slots can streamline the CFG in some cases, in particular remove BARRIERs, but removing BARRIERs changes the way the instructions are associated with (basic) blocks by the liveness analysis code in resource.c (find_basic_block) and thus can cause entries in the cache maintained by resource.c to become outdated, thus producing wrong answers downstream. The fix is to invalidate the cache entries affected by the removal of BARRIERs in relax_delay_slots, i.e. for the instructions down to the next BARRIER. PR rtl-optimization/94119 * resource.h (clear_hashed_info_until_next_barrier): Declare. * resource.c (clear_hashed_info_until_next_barrier): New function. * reorg.c (add_to_delay_list): Fix formatting. (relax_delay_slots): Call clear_hashed_info_until_next_barrier on the next instruction after removing a BARRIER.
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@ -1,3 +1,12 @@
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2019-03-13 Eric Botcazou <ebotcazou@adacore.com>
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PR rtl-optimization/94119
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* resource.h (clear_hashed_info_until_next_barrier): Declare.
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* resource.c (clear_hashed_info_until_next_barrier): New function.
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* reorg.c (add_to_delay_list): Fix formatting.
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(relax_delay_slots): Call clear_hashed_info_until_next_barrier on
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the next instruction after removing a BARRIER.
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2019-03-13 Eric Botcazou <ebotcazou@adacore.com>
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PR middle-end/92071
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26
gcc/reorg.c
26
gcc/reorg.c
@ -575,8 +575,9 @@ add_to_delay_list (rtx_insn *insn, vec<rtx_insn *> *delay_list)
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{
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/* If INSN has its block number recorded, clear it since we may
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be moving the insn to a new block. */
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clear_hashed_info_for_insn (insn);
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delay_list->safe_push (insn);
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clear_hashed_info_for_insn (insn);
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delay_list->safe_push (insn);
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}
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/* Delete INSN from the delay slot of the insn that it is in, which may
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@ -3211,7 +3212,14 @@ relax_delay_slots (rtx_insn *first)
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if (invert_jump (jump_insn, label, 1))
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{
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delete_related_insns (next);
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rtx_insn *from = delete_related_insns (next);
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/* We have just removed a BARRIER, which means that the block
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number of the next insns has effectively been changed (see
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find_basic_block in resource.c), so clear it. */
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if (from)
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clear_hashed_info_until_next_barrier (from);
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next = jump_insn;
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}
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@ -3484,18 +3492,22 @@ relax_delay_slots (rtx_insn *first)
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if (invert_jump (delay_jump_insn, label, 1))
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{
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int i;
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/* Must update the INSN_FROM_TARGET_P bits now that
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the branch is reversed, so that mark_target_live_regs
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will handle the delay slot insn correctly. */
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for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
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for (int i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
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{
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rtx slot = XVECEXP (PATTERN (insn), 0, i);
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INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
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}
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delete_related_insns (next);
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/* We have just removed a BARRIER, which means that the block
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number of the next insns has effectively been changed (see
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find_basic_block in resource.c), so clear it. */
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rtx_insn *from = delete_related_insns (next);
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if (from)
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clear_hashed_info_until_next_barrier (from);
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next = insn;
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}
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@ -1282,7 +1282,26 @@ clear_hashed_info_for_insn (rtx_insn *insn)
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tinfo->block = -1;
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}
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}
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/* Clear any hashed information that we have stored for instructions
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between INSN and the next BARRIER that follow a JUMP or a LABEL. */
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void
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clear_hashed_info_until_next_barrier (rtx_insn *insn)
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{
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while (insn && !BARRIER_P (insn))
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{
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if (JUMP_P (insn) || LABEL_P (insn))
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{
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rtx_insn *next = next_active_insn (insn);
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if (next)
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clear_hashed_info_for_insn (next);
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}
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insn = next_nonnote_insn (insn);
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}
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}
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/* Increment the tick count for the basic block that contains INSN. */
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void
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@ -46,6 +46,7 @@ extern void mark_set_resources (rtx, struct resources *, int,
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enum mark_resource_type);
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extern void mark_referenced_resources (rtx, struct resources *, bool);
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extern void clear_hashed_info_for_insn (rtx_insn *);
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extern void clear_hashed_info_until_next_barrier (rtx_insn *);
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extern void incr_ticks_for_insn (rtx_insn *);
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extern void mark_end_of_function_resources (rtx, bool);
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extern void init_resource_info (rtx_insn *);
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