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remove score-* support
libgcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * config.host: Remove support for score-*. contrib/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * compare-all-tests: Don't test score-*. * config-list.mk: Likewise. gcc/ChangeLog: 2014-10-04 Trevor Saunders <tsaunders@mozilla.com> * common/config/score/score-common.c: Remove. * config.gcc: Remove support for score-*. * config/score/constraints.md: Remove. * config/score/elf.h: Remove. * config/score/predicates.md: Remove. * config/score/score-conv.h: Remove. * config/score/score-generic.md: Remove. * config/score/score-modes.def: Remove. * config/score/score-protos.h: Remove. * config/score/score.c: Remove. * config/score/score.h: Remove. * config/score/score.md: Remove. * config/score/score.opt: Remove. * doc/md.texi: Don't document score-*. From-SVN: r215889
This commit is contained in:
Trevor Saunders
Trevor Saunders
parent
bf55b4a0ef
commit
3daa7bbf79
@ -1,3 +1,8 @@
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2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
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* compare-all-tests: Don't test score-*.
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* config-list.mk: Likewise.
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2014-10-02 Segher Boessenkool <segher@kernel.crashing.org>
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* dg-extract-results.py (output_variation): Always sort if do_sum.
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@ -31,12 +31,11 @@ mn10300_opts='-mam33 -mam33-2'
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pa_opts='-march=2.0 -march=1.0 -march=1.1'
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ppc_opts='-m32 -m64'
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s390_opts='-m31 -m31/-mzarch -m64'
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score_opts='-mscore3 -mscore7'
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sh64_opts='-m5-32media -m5-32media-nofpu -m5-64media -m5-64media-nofpu -m5-compact -m5-compact-nofpu'
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sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
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sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
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all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 ppc score sh sh64 sparc spu v850 vax xstormy16 xtensa' # e500
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all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 ppc sh sh64 sparc spu v850 vax xstormy16 xtensa' # e500
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test_one_file ()
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{
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@ -76,7 +76,7 @@ LIST = aarch64-elf aarch64-linux-gnu \
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x86_64-knetbsd-gnu x86_64-w64-mingw32 \
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x86_64-mingw32OPT-enable-sjlj-exceptions=yes xstormy16-elf xtensa-elf \
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xtensa-linux \
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i686-interix3OPT-enable-obsolete score-elfOPT-enable-obsolete
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i686-interix3OPT-enable-obsolete
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LOGFILES = $(patsubst %,log/%-make.out,$(LIST))
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all: $(LOGFILES)
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@ -1,7 +1,24 @@
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2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
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* common/config/score/score-common.c: Remove.
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* config.gcc: Remove support for score-*.
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* config/score/constraints.md: Remove.
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* config/score/elf.h: Remove.
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* config/score/predicates.md: Remove.
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* config/score/score-conv.h: Remove.
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* config/score/score-generic.md: Remove.
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* config/score/score-modes.def: Remove.
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* config/score/score-protos.h: Remove.
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* config/score/score.c: Remove.
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* config/score/score.h: Remove.
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* config/score/score.md: Remove.
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* config/score/score.opt: Remove.
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* doc/md.texi: Don't document score-*.
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2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
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PR pch/63429
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* genconditions.c: Directly include ggc.h before rtl.h.
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PR pch/63429
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* genconditions.c: Directly include ggc.h before rtl.h.
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2014-10-03 Jan Hubicka <hubicka@ucw.cz>
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@ -1,74 +0,0 @@
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/* Common hooks for Sunplus S+CORE.
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Copyright (C) 2005-2014 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "common/common-target.h"
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#include "common/common-target-def.h"
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#include "opts.h"
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#include "flags.h"
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/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
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static const struct default_options score_option_optimization_table[] =
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{
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{ OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
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{ OPT_LEVELS_NONE, 0, NULL, 0 }
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};
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#undef TARGET_DEFAULT_TARGET_FLAGS
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#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
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#undef TARGET_HANDLE_OPTION
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#define TARGET_HANDLE_OPTION score_handle_option
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#undef TARGET_OPTION_OPTIMIZATION_TABLE
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#define TARGET_OPTION_OPTIMIZATION_TABLE score_option_optimization_table
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#define MASK_ALL_CPU_BITS (MASK_SCORE7 | MASK_SCORE7D)
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/* Implement TARGET_HANDLE_OPTION. */
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static bool
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score_handle_option (struct gcc_options *opts,
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struct gcc_options *opts_set ATTRIBUTE_UNUSED,
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const struct cl_decoded_option *decoded,
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location_t loc ATTRIBUTE_UNUSED)
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{
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size_t code = decoded->opt_index;
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int value = decoded->value;
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switch (code)
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{
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case OPT_mscore7d:
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opts->x_target_flags &= ~(MASK_ALL_CPU_BITS);
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opts->x_target_flags |= MASK_SCORE7 | MASK_SCORE7D;
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return true;
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case OPT_march_:
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opts->x_target_flags &= ~(MASK_ALL_CPU_BITS);
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opts->x_target_flags |= value;
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return true;
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default:
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return true;
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}
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}
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struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
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@ -236,7 +236,8 @@ md_file=
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# Obsolete configurations.
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case ${target} in
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score-* \
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# Currently there are no obsolete targets.
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nothing \
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)
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if test "x$enable_obsolete" != xyes; then
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echo "*** Configuration ${target} is obsolete." >&2
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@ -432,10 +433,6 @@ powerpc*-*-*)
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rs6000*-*-*)
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extra_options="${extra_options} g.opt fused-madd.opt rs6000/rs6000-tables.opt"
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;;
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score*-*-*)
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cpu_type=score
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extra_options="${extra_options} g.opt"
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;;
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sparc*-*-*)
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cpu_type=sparc
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c_target_objs="sparc-c.o"
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@ -2441,11 +2438,6 @@ s390x-ibm-tpf*)
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thread_file='tpf'
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extra_options="${extra_options} s390/tpf.opt"
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;;
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score-*-elf)
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gas=yes
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gnu_ld=yes
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tm_file="dbxelf.h elfos.h score/elf.h score/score.h newlib-stdint.h"
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;;
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sh-*-elf* | sh[12346l]*-*-elf* | \
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sh-*-linux* | sh[2346lbe]*-*-linux* | \
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sh-*-netbsdelf* | shl*-*-netbsdelf* | sh5-*-netbsd* | sh5l*-*-netbsd* | \
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@ -1,93 +0,0 @@
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;; Constraint definitions for S+CORE
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;; Copyright (C) 2005-2014 Free Software Foundation, Inc.
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;; Contributed by Sunnorth.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 3, or (at your
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>. */
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;; -------------------------------------------------------------------------
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;; Constraints
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;; -------------------------------------------------------------------------
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;; Register constraints.
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(define_register_constraint "d" "G32_REGS"
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"r0 to r31")
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(define_register_constraint "e" "G16_REGS"
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"r0 to r15")
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(define_register_constraint "t" "T32_REGS"
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"r8 to r11 | r22 to r27")
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(define_register_constraint "h" "HI_REG"
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"hi")
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(define_register_constraint "l" "LO_REG"
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"lo")
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(define_register_constraint "x" "CE_REGS"
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"hi + lo")
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(define_register_constraint "q" "CN_REG"
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"cnt")
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(define_register_constraint "y" "LC_REG"
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"lcb")
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(define_register_constraint "z" "SC_REG"
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"scb")
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(define_register_constraint "a" "SP_REGS"
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"cnt + lcb + scb")
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(define_register_constraint "c" "CR_REGS"
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"cr0 to cr15")
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;; Integer constant constraints.
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(define_constraint "I"
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"High 16-bit constant (32-bit constant with 16 LSBs zero)."
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(and (match_code "const_int")
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(match_test "(ival & 0xffff) == 0")))
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(define_constraint "J"
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"Unsigned 5 bit integer (in the range 0 to 31)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 31")))
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(define_constraint "K"
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"Unsigned 16 bit integer (in the range 0 to 65535)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 65535")))
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(define_constraint "L"
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"Signed 16 bit integer (in the range −32768 to 32767)."
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(and (match_code "const_int")
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(match_test "ival >= -32768 && ival <= 32767")))
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(define_constraint "M"
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"Unsigned 14 bit integer (in the range 0 to 16383)."
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(and (match_code "const_int")
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(match_test "ival >= 0 && ival <= 16383")))
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(define_constraint "N"
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"Signed 14 bit integer (in the range −8192 to 8191)."
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(and (match_code "const_int")
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(match_test "ival >= -8192 && ival <= 8191")))
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(define_constraint "Z"
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"Any SYMBOL_REF."
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(and (match_code "symbol_ref")
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(match_test "GET_CODE (op) == SYMBOL_REF")))
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@ -1,97 +0,0 @@
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/* elf.h for Sunplus S+CORE processor
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Copyright (C) 2005-2014 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#define OBJECT_FORMAT_ELF
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/* Biggest alignment supported by the object file format of this machine. */
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#undef MAX_OFILE_ALIGNMENT
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#define MAX_OFILE_ALIGNMENT (32768 * 8)
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/* Switch into a generic section. */
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#undef TARGET_ASM_NAMED_SECTION
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#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
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/* The following macro defines the format used to output the second
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operand of the .type assembler directive. */
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#define TYPE_OPERAND_FMT "@%s"
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#undef TYPE_ASM_OP
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#define TYPE_ASM_OP "\t.type\t"
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#undef SIZE_ASM_OP
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#define SIZE_ASM_OP "\t.size\t"
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/* A c expression whose value is a string containing the
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assembler operation to identify the following data as
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uninitialized global data. */
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#ifndef BSS_SECTION_ASM_OP
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#define BSS_SECTION_ASM_OP "\t.section\t.bss"
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#endif
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#ifndef ASM_OUTPUT_ALIGNED_BSS
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#define ASM_OUTPUT_ALIGNED_BSS asm_output_aligned_bss
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#endif
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#define ASM_OUTPUT_DEF(FILE, LABEL1, LABEL2) \
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do { \
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fputc ('\t', FILE); \
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assemble_name (FILE, LABEL1); \
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fputs (" = ", FILE); \
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assemble_name (FILE, LABEL2); \
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fputc ('\n', FILE); \
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} while (0)
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/* This is how we tell the assembler that a symbol is weak. */
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#undef ASM_WEAKEN_LABEL
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#define ASM_WEAKEN_LABEL(FILE, NAME) ASM_OUTPUT_WEAK_ALIAS (FILE, NAME, 0)
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#define ASM_OUTPUT_WEAK_ALIAS(FILE, NAME, VALUE) \
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do { \
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fputs ("\t.weak\t", FILE); \
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assemble_name (FILE, NAME); \
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if (VALUE) \
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{ \
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fputc (' ', FILE); \
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assemble_name (FILE, VALUE); \
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} \
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fputc ('\n', FILE); \
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} while (0)
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#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)
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|
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/* On elf, we *do* have support for the .init and .fini sections, and we
|
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can put stuff in there to be executed before and after `main'. We let
|
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crtstuff.c and other files know this by defining the following symbols.
|
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The definitions say how to change sections to the .init and .fini
|
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sections. This is the same for all known elf assemblers. */
|
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#undef INIT_SECTION_ASM_OP
|
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#define INIT_SECTION_ASM_OP "\t.section\t.init"
|
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#undef FINI_SECTION_ASM_OP
|
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#define FINI_SECTION_ASM_OP "\t.section\t.fini"
|
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|
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/* Don't set the target flags, this is done by the linker script */
|
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#undef LIB_SPEC
|
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#define LIB_SPEC ""
|
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|
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#undef STARTFILE_SPEC
|
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#define STARTFILE_SPEC "crti%O%s crtbegin%O%s"
|
||||
|
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#undef ENDFILE_SPEC
|
||||
#define ENDFILE_SPEC "crtend%O%s crtn%O%s"
|
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@ -1,152 +0,0 @@
|
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;; Predicate definitions for Sunplus S+CORE.
|
||||
;; Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
;;
|
||||
;; This file is part of GCC.
|
||||
;;
|
||||
;; GCC is free software; you can redistribute it and/or modify
|
||||
;; it under the terms of the GNU General Public License as published by
|
||||
;; the Free Software Foundation; either version 3, or (at your option)
|
||||
;; any later version.
|
||||
;;
|
||||
;; GCC is distributed in the hope that it will be useful,
|
||||
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
;; GNU General Public License for more details.
|
||||
;;
|
||||
;; You should have received a copy of the GNU General Public License
|
||||
;; along with GCC; see the file COPYING3. If not see
|
||||
;; <http://www.gnu.org/licenses/>.
|
||||
|
||||
(define_predicate "const_uimm5"
|
||||
(match_code "const_int")
|
||||
{
|
||||
return IMM_IN_RANGE (INTVAL (op), 5, 0);
|
||||
})
|
||||
|
||||
(define_predicate "const_simm12"
|
||||
(match_code "const_int")
|
||||
{
|
||||
return IMM_IN_RANGE (INTVAL (op), 12, 1);
|
||||
})
|
||||
|
||||
(define_predicate "const_simm15"
|
||||
(match_code "const_int")
|
||||
{
|
||||
return IMM_IN_RANGE (INTVAL (op), 15, 1);
|
||||
})
|
||||
|
||||
(define_predicate "arith_operand"
|
||||
(ior (match_code "const_int")
|
||||
(match_operand 0 "register_operand")))
|
||||
|
||||
(define_predicate "score_register_operand"
|
||||
(match_code "reg,subreg")
|
||||
{
|
||||
if (GET_CODE (op) == SUBREG)
|
||||
op = SUBREG_REG (op);
|
||||
|
||||
return (GET_CODE (op) == REG)
|
||||
&& (REGNO (op) != CC_REGNUM);
|
||||
})
|
||||
|
||||
(define_predicate "const_call_insn_operand"
|
||||
(match_code "const,symbol_ref,label_ref")
|
||||
{
|
||||
enum score_symbol_type symbol_type;
|
||||
|
||||
return (score_symbolic_constant_p (op, &symbol_type)
|
||||
&& (symbol_type == SYMBOL_GENERAL));
|
||||
})
|
||||
|
||||
(define_predicate "call_insn_operand"
|
||||
(ior (match_operand 0 "const_call_insn_operand")
|
||||
(match_operand 0 "register_operand")))
|
||||
|
||||
(define_predicate "hireg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "REGNO (op) == HI_REGNUM")))
|
||||
|
||||
(define_predicate "loreg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "REGNO (op) == LO_REGNUM")))
|
||||
|
||||
(define_predicate "sr0_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "REGNO (op) == CN_REGNUM")))
|
||||
|
||||
(define_predicate "g32reg_operand"
|
||||
(and (match_code "reg")
|
||||
(match_test "GP_REG_P (REGNO (op))")))
|
||||
|
||||
(define_predicate "branch_n_operator"
|
||||
(match_code "lt,ge"))
|
||||
|
||||
(define_predicate "branch_nz_operator"
|
||||
(match_code "eq,ne,lt,ge"))
|
||||
|
||||
(define_predicate "score_load_multiple_operation"
|
||||
(match_code "parallel")
|
||||
{
|
||||
int count = XVECLEN (op, 0);
|
||||
int dest_regno;
|
||||
int i;
|
||||
|
||||
/* Perform a quick check so we don't blow up below. */
|
||||
if (count <= 1
|
||||
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|
||||
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
|
||||
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
|
||||
return 0;
|
||||
|
||||
dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
|
||||
|
||||
for (i = 1; i < count; i++)
|
||||
{
|
||||
rtx elt = XVECEXP (op, 0, i);
|
||||
|
||||
if (GET_CODE (elt) != SET
|
||||
|| GET_CODE (SET_DEST (elt)) != REG
|
||||
|| GET_MODE (SET_DEST (elt)) != SImode
|
||||
|| REGNO (SET_DEST (elt)) != (unsigned) (dest_regno + i)
|
||||
|| GET_CODE (SET_SRC (elt)) != MEM
|
||||
|| GET_MODE (SET_SRC (elt)) != SImode
|
||||
|| GET_CODE (XEXP (SET_SRC (elt), 0)) != POST_INC)
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
})
|
||||
|
||||
(define_predicate "score_store_multiple_operation"
|
||||
(match_code "parallel")
|
||||
{
|
||||
int count = XVECLEN (op, 0);
|
||||
int src_regno;
|
||||
int i;
|
||||
|
||||
/* Perform a quick check so we don't blow up below. */
|
||||
if (count <= 1
|
||||
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|
||||
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
|
||||
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
|
||||
return 0;
|
||||
|
||||
src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
|
||||
|
||||
for (i = 1; i < count; i++)
|
||||
{
|
||||
rtx elt = XVECEXP (op, 0, i);
|
||||
|
||||
if (GET_CODE (elt) != SET
|
||||
|| GET_CODE (SET_SRC (elt)) != REG
|
||||
|| GET_MODE (SET_SRC (elt)) != SImode
|
||||
|| REGNO (SET_SRC (elt)) != (unsigned) (src_regno + i)
|
||||
|| GET_CODE (SET_DEST (elt)) != MEM
|
||||
|| GET_MODE (SET_DEST (elt)) != SImode
|
||||
|| GET_CODE (XEXP (SET_DEST (elt), 0)) != PRE_DEC)
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
})
|
||||
|
||||
@ -1,78 +0,0 @@
|
||||
/* score-conv.h for Sunplus S+CORE processor
|
||||
Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published
|
||||
by the Free Software Foundation; either version 3, or (at your
|
||||
option) any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||||
License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef GCC_SCORE_CONV_H
|
||||
#define GCC_SCORE_CONV_H
|
||||
|
||||
#define GP_REG_FIRST 0U
|
||||
#define GP_REG_LAST 31U
|
||||
#define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1U)
|
||||
#define GP_DBX_FIRST 0U
|
||||
|
||||
#define CE_REG_FIRST 48U
|
||||
#define CE_REG_LAST 49U
|
||||
#define CE_REG_NUM (CE_REG_LAST - CE_REG_FIRST + 1U)
|
||||
|
||||
#define ARG_REG_FIRST 4U
|
||||
#define ARG_REG_LAST 7U
|
||||
#define ARG_REG_NUM (ARG_REG_LAST - ARG_REG_FIRST + 1U)
|
||||
|
||||
#define REG_CONTAIN(REGNO, FIRST, NUM) \
|
||||
((unsigned int)((int) (REGNO) - (FIRST)) < (NUM))
|
||||
|
||||
#define GP_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, GP_REG_NUM)
|
||||
|
||||
#define G8_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, 8)
|
||||
|
||||
#define G16_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, 16)
|
||||
|
||||
#define CE_REG_P(REGNO) REG_CONTAIN (REGNO, CE_REG_FIRST, CE_REG_NUM)
|
||||
|
||||
#define GR_REG_CLASS_P(C) ((C) == G16_REGS || (C) == G32_REGS)
|
||||
#define SP_REG_CLASS_P(C) \
|
||||
((C) == CN_REG || (C) == LC_REG || (C) == SC_REG || (C) == SP_REGS)
|
||||
#define CP_REG_CLASS_P(C) \
|
||||
((C) == CP1_REGS || (C) == CP2_REGS || (C) == CP3_REGS || (C) == CPA_REGS)
|
||||
#define CE_REG_CLASS_P(C) \
|
||||
((C) == HI_REG || (C) == LO_REG || (C) == CE_REGS)
|
||||
|
||||
#define UIMM_IN_RANGE(V, W) \
|
||||
((V) >= 0 \
|
||||
&& ((unsigned HOST_WIDE_INT) (V) \
|
||||
<= (((unsigned HOST_WIDE_INT) 2 << ((W) - 1)) - 1)))
|
||||
|
||||
#define SIMM_IN_RANGE(V, W) \
|
||||
((V) >= ((HOST_WIDE_INT) -1 << ((W) - 1)) \
|
||||
&& (V) <= (((HOST_WIDE_INT) 1 << ((W) - 1)) - 1))
|
||||
|
||||
#define IMM_IN_RANGE(V, W, S) \
|
||||
((S) ? SIMM_IN_RANGE (V, W) : UIMM_IN_RANGE (V, W))
|
||||
|
||||
#define IMM_IS_POW_OF_2(V, E1, E2) \
|
||||
((V) >= ((unsigned HOST_WIDE_INT) 1 << (E1)) \
|
||||
&& (V) <= ((unsigned HOST_WIDE_INT) 1 << (E2)) \
|
||||
&& ((V) & ((V) - 1)) == 0)
|
||||
|
||||
enum score_symbol_type
|
||||
{
|
||||
SYMBOL_GENERAL,
|
||||
SYMBOL_SMALL_DATA /* The symbol refers to something in a small data section */
|
||||
};
|
||||
|
||||
#endif
|
||||
@ -1,44 +0,0 @@
|
||||
;; Machine description for Sunplus S+CORE
|
||||
;; Sunplus S+CORE Pipeline Description
|
||||
;; Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
;; Contributed by Sunnorth.
|
||||
|
||||
;; This file is part of GCC.
|
||||
|
||||
;; GCC is free software; you can redistribute it and/or modify
|
||||
;; it under the terms of the GNU General Public License as published by
|
||||
;; the Free Software Foundation; either version 3, or (at your option)
|
||||
;; any later version.
|
||||
|
||||
;; GCC is distributed in the hope that it will be useful,
|
||||
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
;; GNU General Public License for more details.
|
||||
|
||||
;; You should have received a copy of the GNU General Public License
|
||||
;; along with GCC; see the file COPYING3. If not see
|
||||
;; <http://www.gnu.org/licenses/>.
|
||||
|
||||
(define_automaton "score")
|
||||
|
||||
(define_cpu_unit "core" "score")
|
||||
|
||||
(define_insn_reservation "memory" 3
|
||||
(eq_attr "type" "load")
|
||||
"core")
|
||||
|
||||
(define_insn_reservation "mul" 3
|
||||
(eq_attr "type" "mul,div")
|
||||
"core")
|
||||
|
||||
(define_insn_reservation "fce" 1
|
||||
(eq_attr "type" "fce")
|
||||
"core")
|
||||
|
||||
(define_insn_reservation "tsr" 1
|
||||
(eq_attr "type" "tsr,fsr")
|
||||
"core")
|
||||
|
||||
(define_insn_reservation "up_c" 1
|
||||
(eq_attr "up_c" "yes")
|
||||
"core")
|
||||
@ -1,24 +0,0 @@
|
||||
/* score-modes.def for Sunplus S+CORE processor
|
||||
Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published
|
||||
by the Free Software Foundation; either version 3, or (at your
|
||||
option) any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||||
License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* CC_NZmode should be used if the N (sign) and Z (zero) flag is set correctly.
|
||||
CC_Nmode should be used if only the N flag is set correctly. */
|
||||
|
||||
CC_MODE (CC_N);
|
||||
CC_MODE (CC_NZ);
|
||||
@ -1,83 +0,0 @@
|
||||
/* score-protos.h for Sunplus S+CORE processor
|
||||
Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published
|
||||
by the Free Software Foundation; either version 3, or (at your
|
||||
option) any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||||
License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
#ifndef GCC_SCORE_PROTOS_H
|
||||
#define GCC_SCORE_PROTOS_H
|
||||
|
||||
/* Machine Print. */
|
||||
enum score_mem_unit {SCORE_BYTE = 0, SCORE_HWORD = 1, SCORE_WORD = 2};
|
||||
|
||||
#define SCORE_ALIGN_UNIT(V, UNIT) !(V & ((1 << UNIT) - 1))
|
||||
|
||||
extern void score_prologue (void);
|
||||
extern void score_epilogue (int sibcall_p);
|
||||
extern void score_call (rtx *ops, bool sib);
|
||||
extern void score_call_value (rtx *ops, bool sib);
|
||||
extern void score_movdi (rtx *ops);
|
||||
extern void score_zero_extract_andi (rtx *ops);
|
||||
extern const char * score_linsn (rtx *ops, enum score_mem_unit unit, bool sign);
|
||||
extern const char * score_sinsn (rtx *ops, enum score_mem_unit unit);
|
||||
extern const char * score_limm (rtx *ops);
|
||||
extern const char * score_move (rtx *ops);
|
||||
extern bool score_unaligned_load (rtx* ops);
|
||||
extern bool score_unaligned_store (rtx* ops);
|
||||
extern bool score_block_move (rtx* ops);
|
||||
extern int score_address_cost (rtx addr, enum machine_mode mode,
|
||||
addr_space_t as, bool speed);
|
||||
extern int score_address_p (enum machine_mode mode, rtx x, int strict);
|
||||
extern int score_reg_class (int regno);
|
||||
extern int score_hard_regno_mode_ok (unsigned int, enum machine_mode);
|
||||
extern int score_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
|
||||
extern int score_extra_constraint (rtx op, char c);
|
||||
extern rtx score_return_addr (int count, rtx frame);
|
||||
extern int score_regno_mode_ok_for_base_p (int regno, int strict);
|
||||
extern void score_init_cumulative_args (CUMULATIVE_ARGS *cum,
|
||||
tree fntype, rtx libname);
|
||||
extern void score_declare_object (FILE *stream, const char *name,
|
||||
const char *directive, const char *fmt, ...);
|
||||
extern int score_output_external (FILE *file, tree decl, const char *name);
|
||||
extern enum reg_class score_secondary_reload_class (enum reg_class rclass,
|
||||
enum machine_mode mode,
|
||||
rtx x);
|
||||
extern rtx score_function_value (const_tree valtype, const_tree func,
|
||||
enum machine_mode mode);
|
||||
extern enum reg_class score_preferred_reload_class (rtx x,
|
||||
enum reg_class rclass);
|
||||
extern HOST_WIDE_INT score_initial_elimination_offset (int from, int to);
|
||||
extern void score_print_operand (FILE *file, rtx op, int letter);
|
||||
extern void score_print_operand_address (FILE *file, rtx addr);
|
||||
extern int score_symbolic_constant_p (rtx x,
|
||||
enum score_symbol_type *symbol_type);
|
||||
extern void score_movsicc (rtx *ops);
|
||||
extern const char * score_select_add_imm (rtx *ops, bool set_cc);
|
||||
extern const char * score_select (rtx *ops, const char *inst_pre, bool commu,
|
||||
const char *letter, bool set_cc);
|
||||
extern const char * score_output_casesi (rtx *operands);
|
||||
extern const char * score_rpush (rtx *ops);
|
||||
extern const char * score_rpop (rtx *ops);
|
||||
extern bool score_rtx_costs (rtx x, int code, int outer_code, int opno,
|
||||
int *total, bool speed);
|
||||
|
||||
#ifdef RTX_CODE
|
||||
extern enum machine_mode score_select_cc_mode (enum rtx_code op, rtx x, rtx y);
|
||||
#endif
|
||||
|
||||
extern struct extern_list *extern_head;
|
||||
|
||||
#endif /* GCC_SCORE_PROTOS_H */
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,867 +0,0 @@
|
||||
/* score.h for Sunplus S+CORE processor
|
||||
Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
Contributed by Sunnorth.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published
|
||||
by the Free Software Foundation; either version 3, or (at your
|
||||
option) any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||||
License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
#include "score-conv.h"
|
||||
|
||||
#undef CC1_SPEC
|
||||
#define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
|
||||
%{!mscore*:-mscore7} \
|
||||
%{mscore7:-mscore7} \
|
||||
%{mscore7d:-mscore7d} \
|
||||
%{G*}"
|
||||
|
||||
#undef ASM_SPEC
|
||||
#define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \
|
||||
%{!mscore*:-march=score7} \
|
||||
%{mscore7:-march=score7} \
|
||||
%{mscore7d:-march=score7} \
|
||||
%{march=score7:-march=score7} \
|
||||
%{march=score7d:-march=score7} \
|
||||
%{G*}"
|
||||
|
||||
#undef LINK_SPEC
|
||||
#define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \
|
||||
%{!mscore*:-mscore7_elf} \
|
||||
%{mscore7:-mscore7_elf} \
|
||||
%{mscore7d:-mscore7_elf} \
|
||||
%{march=score7:-mscore7_elf} \
|
||||
%{march=score7d:-mscore7_elf} \
|
||||
%{G*}"
|
||||
|
||||
/* Run-time Target Specification. */
|
||||
#define TARGET_CPU_CPP_BUILTINS() \
|
||||
do { \
|
||||
builtin_define ("SUNPLUS"); \
|
||||
builtin_define ("__SCORE__"); \
|
||||
builtin_define ("__score__"); \
|
||||
if (TARGET_LITTLE_ENDIAN) \
|
||||
builtin_define ("__scorele__"); \
|
||||
else \
|
||||
builtin_define ("__scorebe__"); \
|
||||
if (TARGET_SCORE7) \
|
||||
builtin_define ("__score7__"); \
|
||||
if (TARGET_SCORE7D) \
|
||||
builtin_define ("__score7d__"); \
|
||||
} while (0)
|
||||
|
||||
#define TARGET_DEFAULT 0
|
||||
|
||||
#define SCORE_GCC_VERSION "1.6"
|
||||
|
||||
/* Target machine storage layout. */
|
||||
#define BITS_BIG_ENDIAN 0
|
||||
#define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
|
||||
#define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
|
||||
|
||||
/* Width of a word, in units (bytes). */
|
||||
#define UNITS_PER_WORD 4
|
||||
|
||||
/* Define this macro if it is advisable to hold scalars in registers
|
||||
in a wider mode than that declared by the program. In such cases,
|
||||
the value is constrained to be within the bounds of the declared
|
||||
type, but kept valid in the wider mode. The signedness of the
|
||||
extension may differ from that of the type. */
|
||||
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
|
||||
if (GET_MODE_CLASS (MODE) == MODE_INT \
|
||||
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
|
||||
(MODE) = SImode;
|
||||
|
||||
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
|
||||
#define PARM_BOUNDARY BITS_PER_WORD
|
||||
#define STACK_BOUNDARY BITS_PER_WORD
|
||||
|
||||
/* Allocation boundary (in *bits*) for the code of a function. */
|
||||
#define FUNCTION_BOUNDARY BITS_PER_WORD
|
||||
|
||||
/* There is no point aligning anything to a rounder boundary than this. */
|
||||
#define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE
|
||||
|
||||
/* If defined, a C expression to compute the alignment for a static
|
||||
variable. TYPE is the data type, and ALIGN is the alignment that
|
||||
the object would ordinarily have. The value of this macro is used
|
||||
instead of that alignment to align the object.
|
||||
|
||||
If this macro is not defined, then ALIGN is used.
|
||||
|
||||
One use of this macro is to increase alignment of medium-size
|
||||
data to make it all fit in fewer cache lines. Another is to
|
||||
cause character arrays to be word-aligned so that `strcpy' calls
|
||||
that copy constants to character arrays can be done inline. */
|
||||
#define DATA_ALIGNMENT(TYPE, ALIGN) \
|
||||
((((ALIGN) < BITS_PER_WORD) \
|
||||
&& (TREE_CODE (TYPE) == ARRAY_TYPE \
|
||||
|| TREE_CODE (TYPE) == UNION_TYPE \
|
||||
|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
|
||||
|
||||
/* If defined, a C expression to compute the alignment given to a
|
||||
constant that is being placed in memory. EXP is the constant
|
||||
and ALIGN is the alignment that the object would ordinarily have.
|
||||
The value of this macro is used instead of that alignment to align
|
||||
the object.
|
||||
|
||||
If this macro is not defined, then ALIGN is used.
|
||||
|
||||
The typical use of this macro is to increase alignment for string
|
||||
constants to be word aligned so that `strcpy' calls that copy
|
||||
constants can be done inline. */
|
||||
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
|
||||
((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
|
||||
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
||||
|
||||
/* If defined, a C expression to compute the alignment for a local
|
||||
variable. TYPE is the data type, and ALIGN is the alignment that
|
||||
the object would ordinarily have. The value of this macro is used
|
||||
instead of that alignment to align the object.
|
||||
|
||||
If this macro is not defined, then ALIGN is used.
|
||||
|
||||
One use of this macro is to increase alignment of medium-size
|
||||
data to make it all fit in fewer cache lines. */
|
||||
#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
|
||||
((TREE_CODE (TYPE) == ARRAY_TYPE \
|
||||
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
||||
&& (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
|
||||
|
||||
/* Alignment of field after `int : 0' in a structure. */
|
||||
#define EMPTY_FIELD_BOUNDARY 32
|
||||
|
||||
/* All accesses must be aligned. */
|
||||
#define STRICT_ALIGNMENT 1
|
||||
|
||||
/* Score requires that structure alignment is affected by bitfields. */
|
||||
#define PCC_BITFIELD_TYPE_MATTERS 1
|
||||
|
||||
/* long double is not a fixed mode, but the idea is that, if we
|
||||
support long double, we also want a 128-bit integer type. */
|
||||
#define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
|
||||
|
||||
/* Layout of Data Type. */
|
||||
/* Set the sizes of the core types. */
|
||||
#define INT_TYPE_SIZE 32
|
||||
#define SHORT_TYPE_SIZE 16
|
||||
#define LONG_TYPE_SIZE 32
|
||||
#define LONG_LONG_TYPE_SIZE 64
|
||||
#define CHAR_TYPE_SIZE 8
|
||||
#define FLOAT_TYPE_SIZE 32
|
||||
#define DOUBLE_TYPE_SIZE 64
|
||||
#define LONG_DOUBLE_TYPE_SIZE 64
|
||||
|
||||
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
||||
#undef DEFAULT_SIGNED_CHAR
|
||||
#define DEFAULT_SIGNED_CHAR 1
|
||||
|
||||
/* Default definitions for size_t and ptrdiff_t. */
|
||||
#define SIZE_TYPE "unsigned int"
|
||||
|
||||
#define UINTPTR_TYPE "long unsigned int"
|
||||
|
||||
/* Register Usage
|
||||
|
||||
S+core have:
|
||||
- 32 integer registers
|
||||
- 16 control registers (cond)
|
||||
- 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
|
||||
- 32 coprocessors 1 registers
|
||||
- 32 coprocessors 2 registers
|
||||
- 32 coprocessors 3 registers. */
|
||||
#define FIRST_PSEUDO_REGISTER 160
|
||||
|
||||
/* By default, fix the kernel registers (r30 and r31), the global
|
||||
pointer (r28) and the stack pointer (r0). This can change
|
||||
depending on the command-line options.
|
||||
|
||||
Regarding coprocessor registers: without evidence to the contrary,
|
||||
it's best to assume that each coprocessor register has a unique
|
||||
use. This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
|
||||
TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
|
||||
for a particular target. */
|
||||
|
||||
/* Control Registers, use mfcr/mtcr insn
|
||||
32 cr0 PSR
|
||||
33 cr1 Condition
|
||||
34 cr2 ECR
|
||||
35 cr3 EXCPVec
|
||||
36 cr4 CCR
|
||||
37 cr5 EPC
|
||||
38 cr6 EMA
|
||||
39 cr7 TLBLock
|
||||
40 cr8 TLBPT
|
||||
41 cr8 PEADDR
|
||||
42 cr10 TLBRPT
|
||||
43 cr11 PEVN
|
||||
44 cr12 PECTX
|
||||
45 cr13
|
||||
46 cr14
|
||||
47 cr15
|
||||
|
||||
Custom Engine Register, use mfce/mtce
|
||||
48 CEH CEH
|
||||
49 CEL CEL
|
||||
|
||||
Special-Purpose Register, use mfsr/mtsr
|
||||
50 sr0 CNT
|
||||
51 sr1 LCR
|
||||
52 sr2 SCR
|
||||
|
||||
53 ARG_POINTER_REGNUM
|
||||
54 FRAME_POINTER_REGNUM
|
||||
but Control register have 32 registers, cr16-cr31. */
|
||||
#define FIXED_REGISTERS \
|
||||
{ \
|
||||
/* General Purpose Registers */ \
|
||||
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
|
||||
/* Control Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
|
||||
0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 1 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 2 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 3 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
}
|
||||
|
||||
#define CALL_USED_REGISTERS \
|
||||
{ \
|
||||
/* General purpose register */ \
|
||||
1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* Control Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 1 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 2 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* CP 3 Registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
}
|
||||
|
||||
#define REG_ALLOC_ORDER \
|
||||
{ 0, 1, 6, 7, 8, 9, 10, 11, 4, 5, 22, 23, 24, 25, 26, 27, \
|
||||
12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31, 2, 3, \
|
||||
32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
|
||||
48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \
|
||||
64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
|
||||
80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
|
||||
96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111, \
|
||||
112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \
|
||||
128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
|
||||
144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 }
|
||||
|
||||
/* Macro to conditionally modify fixed_regs/call_used_regs. */
|
||||
#define PIC_OFFSET_TABLE_REGNUM 29
|
||||
|
||||
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
||||
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
||||
|
||||
/* Return true if REGNO is suitable for holding a quantity of type MODE. */
|
||||
#define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
|
||||
|
||||
/* Value is 1 if it is a good idea to tie two pseudo registers
|
||||
when one has mode MODE1 and one has mode MODE2.
|
||||
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
|
||||
for any hard reg, then this must be 0 for correct output. */
|
||||
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
||||
((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
|
||||
|| GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
|
||||
== (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
|
||||
|| GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
|
||||
|
||||
/* Register Classes. */
|
||||
/* Define the classes of registers for register constraints in the
|
||||
machine description. Also define ranges of constants. */
|
||||
enum reg_class
|
||||
{
|
||||
NO_REGS,
|
||||
G16_REGS, /* r0 ~ r15 */
|
||||
G32_REGS, /* r0 ~ r31 */
|
||||
T32_REGS, /* r8 ~ r11 | r22 ~ r27 */
|
||||
|
||||
HI_REG, /* hi */
|
||||
LO_REG, /* lo */
|
||||
CE_REGS, /* hi + lo */
|
||||
|
||||
CN_REG, /* cnt */
|
||||
LC_REG, /* lcb */
|
||||
SC_REG, /* scb */
|
||||
SP_REGS, /* cnt + lcb + scb */
|
||||
|
||||
CR_REGS, /* cr0 - cr15 */
|
||||
|
||||
CP1_REGS, /* cp1 */
|
||||
CP2_REGS, /* cp2 */
|
||||
CP3_REGS, /* cp3 */
|
||||
CPA_REGS, /* cp1 + cp2 + cp3 */
|
||||
|
||||
ALL_REGS,
|
||||
LIM_REG_CLASSES
|
||||
};
|
||||
|
||||
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
|
||||
|
||||
#define GENERAL_REGS G32_REGS
|
||||
|
||||
/* Give names of register classes as strings for dump file. */
|
||||
#define REG_CLASS_NAMES \
|
||||
{ \
|
||||
"NO_REGS", \
|
||||
"G16_REGS", \
|
||||
"G32_REGS", \
|
||||
"T32_REGS", \
|
||||
\
|
||||
"HI_REG", \
|
||||
"LO_REG", \
|
||||
"CE_REGS", \
|
||||
\
|
||||
"CN_REG", \
|
||||
"LC_REG", \
|
||||
"SC_REG", \
|
||||
"SP_REGS", \
|
||||
\
|
||||
"CR_REGS", \
|
||||
\
|
||||
"CP1_REGS", \
|
||||
"CP2_REGS", \
|
||||
"CP3_REGS", \
|
||||
"CPA_REGS", \
|
||||
\
|
||||
"ALL_REGS", \
|
||||
}
|
||||
|
||||
/* Define which registers fit in which classes. */
|
||||
#define REG_CLASS_CONTENTS \
|
||||
{ \
|
||||
/* NO_REGS/G16/G32/T32 */ \
|
||||
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
/* HI/LO/CE */ \
|
||||
{ 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
/* CN/LC/SC/SP/CR */ \
|
||||
{ 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000}, \
|
||||
/* CP1/CP2/CP3/CPA */ \
|
||||
{ 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000}, \
|
||||
{ 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \
|
||||
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \
|
||||
{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \
|
||||
/* ALL_REGS */ \
|
||||
{ 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \
|
||||
}
|
||||
|
||||
/* A C expression whose value is a register class containing hard
|
||||
register REGNO. In general there is more that one such class;
|
||||
choose a class which is "minimal", meaning that no smaller class
|
||||
also contains the register. */
|
||||
#define REGNO_REG_CLASS(REGNO) (enum reg_class) score_reg_class (REGNO)
|
||||
|
||||
/* A macro whose definition is the name of the class to which a
|
||||
valid base register must belong. A base register is one used in
|
||||
an address which is the register value plus a displacement. */
|
||||
#define BASE_REG_CLASS G16_REGS
|
||||
|
||||
/* The class value for index registers. */
|
||||
#define INDEX_REG_CLASS NO_REGS
|
||||
|
||||
/* Addressing modes, and classification of registers for them. */
|
||||
#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
|
||||
score_regno_mode_ok_for_base_p (REGNO, 1)
|
||||
|
||||
#define REGNO_OK_FOR_INDEX_P(NUM) 0
|
||||
|
||||
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
||||
score_preferred_reload_class (X, CLASS)
|
||||
|
||||
/* If we need to load shorts byte-at-a-time, then we need a scratch. */
|
||||
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
|
||||
score_secondary_reload_class (CLASS, MODE, X)
|
||||
|
||||
/* Return the register class of a scratch register needed to copy IN into
|
||||
or out of a register in CLASS in MODE. If it can be done directly,
|
||||
NO_REGS is returned. */
|
||||
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
|
||||
score_secondary_reload_class (CLASS, MODE, X)
|
||||
|
||||
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
||||
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
|
||||
? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
|
||||
|
||||
|
||||
/* Basic Stack Layout. */
|
||||
/* Stack layout; function entry, exit and calling. */
|
||||
#define STACK_GROWS_DOWNWARD
|
||||
|
||||
#define STACK_PUSH_CODE PRE_DEC
|
||||
#define STACK_POP_CODE POST_INC
|
||||
|
||||
/* The offset of the first local variable from the beginning of the frame.
|
||||
See compute_frame_size for details about the frame layout. */
|
||||
#define STARTING_FRAME_OFFSET crtl->outgoing_args_size
|
||||
|
||||
/* The argument pointer always points to the first argument. */
|
||||
#define FIRST_PARM_OFFSET(FUNDECL) 0
|
||||
|
||||
/* A C expression whose value is RTL representing the value of the return
|
||||
address for the frame COUNT steps up from the current frame. */
|
||||
#define RETURN_ADDR_RTX(count, frame) score_return_addr (count, frame)
|
||||
|
||||
/* Pick up the return address upon entry to a procedure. */
|
||||
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNUM)
|
||||
|
||||
/* Exception handling Support. */
|
||||
/* Use r0 to r3 to pass exception handling information. */
|
||||
#define EH_RETURN_DATA_REGNO(N) \
|
||||
((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
|
||||
|
||||
/* The register that holds the return address in exception handlers. */
|
||||
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
|
||||
#define EH_RETURN_HANDLER_RTX gen_rtx_REG (SImode, 30)
|
||||
|
||||
/* Registers That Address the Stack Frame. */
|
||||
/* Register to use for pushing function arguments. */
|
||||
#define STACK_POINTER_REGNUM SP_REGNUM
|
||||
|
||||
/* These two registers don't really exist: they get eliminated to either
|
||||
the stack or hard frame pointer. */
|
||||
#define FRAME_POINTER_REGNUM 53
|
||||
|
||||
/* we use r2 as the frame pointer. */
|
||||
#define HARD_FRAME_POINTER_REGNUM FP_REGNUM
|
||||
|
||||
#define ARG_POINTER_REGNUM 54
|
||||
|
||||
/* Register in which static-chain is passed to a function. */
|
||||
#define STATIC_CHAIN_REGNUM 23
|
||||
|
||||
/* Elimination Frame Pointer and Arg Pointer */
|
||||
|
||||
#define ELIMINABLE_REGS \
|
||||
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
||||
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
|
||||
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
||||
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
|
||||
|
||||
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
||||
(OFFSET) = score_initial_elimination_offset ((FROM), (TO))
|
||||
|
||||
/* Passing Function Arguments on the Stack. */
|
||||
/* Allocate stack space for arguments at the beginning of each function. */
|
||||
#define ACCUMULATE_OUTGOING_ARGS 1
|
||||
|
||||
/* reserve stack space for all argument registers. */
|
||||
#define REG_PARM_STACK_SPACE(FNDECL) UNITS_PER_WORD
|
||||
|
||||
/* Define this if it is the responsibility of the caller to
|
||||
allocate the area reserved for arguments passed in registers.
|
||||
If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
|
||||
of this macro is to determine whether the space is included in
|
||||
`crtl->outgoing_args_size'. */
|
||||
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
|
||||
|
||||
/* Passing Arguments in Registers */
|
||||
/* A C type for declaring a variable that is used as the first argument of
|
||||
`FUNCTION_ARG' and other related values. For some target machines, the
|
||||
type `int' suffices and can hold the number of bytes of argument so far. */
|
||||
typedef struct score_args
|
||||
{
|
||||
unsigned int arg_number; /* how many arguments have been seen */
|
||||
unsigned int num_gprs; /* number of gprs in use */
|
||||
unsigned int stack_words; /* number of words in stack */
|
||||
} score_args_t;
|
||||
|
||||
#define CUMULATIVE_ARGS score_args_t
|
||||
|
||||
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
||||
for a call to a function whose data type is FNTYPE.
|
||||
For a library call, FNTYPE is 0. */
|
||||
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
|
||||
score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
|
||||
|
||||
/* 1 if N is a possible register number for function argument passing.
|
||||
We have no FP argument registers when soft-float. When FP registers
|
||||
are 32 bits, we can't directly reference the odd numbered ones. */
|
||||
#define FUNCTION_ARG_REGNO_P(REGNO) \
|
||||
REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
|
||||
|
||||
/* How Scalar Function Values Are Returned. */
|
||||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||||
score_function_value ((VALTYPE), (FUNC), VOIDmode)
|
||||
|
||||
#define LIBCALL_VALUE(MODE) score_function_value (NULL_TREE, NULL, (MODE))
|
||||
|
||||
/* 1 if N is a possible register number for a function value. */
|
||||
#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == (ARG_REG_FIRST))
|
||||
|
||||
#define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
|
||||
|
||||
/* How Large Values Are Returned. */
|
||||
#define STRUCT_VALUE 0
|
||||
|
||||
/* Function Entry and Exit */
|
||||
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
||||
the stack pointer does not matter. The value is tested only in
|
||||
functions that have frame pointers.
|
||||
No definition is equivalent to always zero. */
|
||||
#define EXIT_IGNORE_STACK 1
|
||||
|
||||
/* Generating Code for Profiling */
|
||||
/* Output assembler code to FILE to increment profiler label # LABELNO
|
||||
for profiling a function entry. */
|
||||
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
||||
do { \
|
||||
if (TARGET_SCORE7) \
|
||||
{ \
|
||||
fprintf (FILE, " .set r1 \n"); \
|
||||
fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
|
||||
fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \
|
||||
fprintf (FILE, " jl _mcount \n"); \
|
||||
fprintf (FILE, " .set nor1 \n"); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* Trampolines for Nested Functions. */
|
||||
#define TRAMPOLINE_INSNS 6
|
||||
|
||||
/* A C expression for the size in bytes of the trampoline, as an integer. */
|
||||
#define TRAMPOLINE_SIZE (24 + GET_MODE_SIZE (ptr_mode) * 2)
|
||||
|
||||
#define HAVE_PRE_INCREMENT 1
|
||||
#define HAVE_PRE_DECREMENT 1
|
||||
#define HAVE_POST_INCREMENT 1
|
||||
#define HAVE_POST_DECREMENT 1
|
||||
#define HAVE_PRE_MODIFY_DISP 1
|
||||
#define HAVE_POST_MODIFY_DISP 1
|
||||
#define HAVE_PRE_MODIFY_REG 0
|
||||
#define HAVE_POST_MODIFY_REG 0
|
||||
|
||||
/* Maximum number of registers that can appear in a valid memory address. */
|
||||
#define MAX_REGS_PER_ADDRESS 1
|
||||
|
||||
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
||||
and check its validity for a certain class.
|
||||
We have two alternate definitions for each of them.
|
||||
The usual definition accepts all pseudo regs; the other rejects them all.
|
||||
The symbol REG_OK_STRICT causes the latter definition to be used.
|
||||
|
||||
Most source files want to accept pseudo regs in the hope that
|
||||
they will get allocated to the class that the insn wants them to be in.
|
||||
Some source files that are used after register allocation
|
||||
need to be strict. */
|
||||
#ifndef REG_OK_STRICT
|
||||
#define REG_MODE_OK_FOR_BASE_P(X, MODE) \
|
||||
score_regno_mode_ok_for_base_p (REGNO (X), 0)
|
||||
#else
|
||||
#define REG_MODE_OK_FOR_BASE_P(X, MODE) \
|
||||
score_regno_mode_ok_for_base_p (REGNO (X), 1)
|
||||
#endif
|
||||
|
||||
#define REG_OK_FOR_INDEX_P(X) 0
|
||||
|
||||
/* Condition Code Status. */
|
||||
#define SELECT_CC_MODE(OP, X, Y) score_select_cc_mode (OP, X, Y)
|
||||
|
||||
/* Return nonzero if SELECT_CC_MODE will never return MODE for a
|
||||
floating point inequality comparison. */
|
||||
#define REVERSIBLE_CC_MODE(MODE) 1
|
||||
|
||||
/* Describing Relative Costs of Operations */
|
||||
/* Try to generate sequences that don't involve branches. */
|
||||
#define BRANCH_COST(speed_p, predictable_p) 2
|
||||
|
||||
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
||||
#define SLOW_BYTE_ACCESS 1
|
||||
|
||||
/* Define this macro if it is as good or better to call a constant
|
||||
function address than to call an address kept in a register. */
|
||||
#define NO_FUNCTION_CSE 1
|
||||
|
||||
/* Dividing the Output into Sections (Texts, Data, ...). */
|
||||
/* Define the strings to put out for each section in the object file. */
|
||||
#define TEXT_SECTION_ASM_OP "\t.text"
|
||||
#define DATA_SECTION_ASM_OP "\t.data"
|
||||
#define SDATA_SECTION_ASM_OP "\t.sdata"
|
||||
|
||||
#undef READONLY_DATA_SECTION_ASM_OP
|
||||
#define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
|
||||
|
||||
/* The Overall Framework of an Assembler File */
|
||||
/* How to start an assembler comment.
|
||||
The leading space is important. */
|
||||
#define ASM_COMMENT_START "#"
|
||||
|
||||
/* Output to assembler file text saying following lines
|
||||
may contain character constants, extra white space, comments, etc. */
|
||||
#define ASM_APP_ON "#APP\n\t.set volatile\n"
|
||||
|
||||
/* Output to assembler file text saying following lines
|
||||
no longer contain unusual constructs. */
|
||||
#define ASM_APP_OFF "#NO_APP\n\t.set optimize\n"
|
||||
|
||||
/* Output of Uninitialized Variables. */
|
||||
/* This says how to define a global common symbol. */
|
||||
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
|
||||
do { \
|
||||
fputs ("\n\t.comm\t", STREAM); \
|
||||
assemble_name (STREAM, NAME); \
|
||||
fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
|
||||
SIZE, ALIGN / BITS_PER_UNIT); \
|
||||
} while (0)
|
||||
|
||||
/* This says how to define a local common symbol (i.e., not visible to
|
||||
linker). */
|
||||
#undef ASM_OUTPUT_ALIGNED_LOCAL
|
||||
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
|
||||
do { \
|
||||
fputs ("\n\t.lcomm\t", STREAM); \
|
||||
assemble_name (STREAM, NAME); \
|
||||
fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
|
||||
SIZE, ALIGN / BITS_PER_UNIT); \
|
||||
} while (0)
|
||||
|
||||
/* Globalizing directive for a label. */
|
||||
#define GLOBAL_ASM_OP "\t.globl\t"
|
||||
|
||||
/* Output and Generation of Labels */
|
||||
/* This is how to declare a function name. The actual work of
|
||||
emitting the label is moved to function_prologue, so that we can
|
||||
get the line number correctly emitted before the .ent directive,
|
||||
and after any .file directives. Define as empty so that the function
|
||||
is not declared before the .ent directive elsewhere. */
|
||||
#undef ASM_DECLARE_FUNCTION_NAME
|
||||
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
|
||||
|
||||
#undef ASM_DECLARE_OBJECT_NAME
|
||||
#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
|
||||
do { \
|
||||
assemble_name (STREAM, NAME); \
|
||||
fprintf (STREAM, ":\n"); \
|
||||
} while (0)
|
||||
|
||||
/* This says how to output an external. It would be possible not to
|
||||
output anything and let undefined symbol become external. However
|
||||
the assembler uses length information on externals to allocate in
|
||||
data/sdata bss/sbss, thereby saving exec time. */
|
||||
#undef ASM_OUTPUT_EXTERNAL
|
||||
#define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
|
||||
score_output_external (STREAM, DECL, NAME)
|
||||
|
||||
/* This handles the magic '..CURRENT_FUNCTION' symbol, which means
|
||||
'the start of the function that this code is output in'. */
|
||||
#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
|
||||
fprintf ((STREAM), "%s", (NAME))
|
||||
|
||||
/* Local compiler-generated symbols must have a prefix that the assembler
|
||||
understands. */
|
||||
#define LOCAL_LABEL_PREFIX (TARGET_SCORE7 ? "." : "$")
|
||||
|
||||
#undef ASM_GENERATE_INTERNAL_LABEL
|
||||
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
|
||||
sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
|
||||
|
||||
/* Output of Assembler Instructions. */
|
||||
#define REGISTER_NAMES \
|
||||
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
|
||||
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
|
||||
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
|
||||
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
|
||||
\
|
||||
"cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
|
||||
"cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", \
|
||||
\
|
||||
"ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "", \
|
||||
"cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", \
|
||||
\
|
||||
"c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7", \
|
||||
"c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15", \
|
||||
"c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
|
||||
"c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
|
||||
\
|
||||
"c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7", \
|
||||
"c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15", \
|
||||
"c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
|
||||
"c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
|
||||
\
|
||||
"c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7", \
|
||||
"c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15", \
|
||||
"c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
|
||||
"c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
|
||||
}
|
||||
|
||||
/* Print operand X (an rtx) in assembler syntax to file FILE. */
|
||||
#define PRINT_OPERAND(STREAM, X, CODE) score_print_operand (STREAM, X, CODE)
|
||||
|
||||
/* A C expression which evaluates to true if CODE is a valid
|
||||
punctuation character for use in the `PRINT_OPERAND' macro. */
|
||||
#define PRINT_OPERAND_PUNCT_VALID_P(C) ((C) == '[' || (C) == ']')
|
||||
|
||||
/* Print a memory address as an operand to reference that memory location. */
|
||||
#define PRINT_OPERAND_ADDRESS(STREAM, X) \
|
||||
score_print_operand_address (STREAM, X)
|
||||
|
||||
/* By default on the S+core, external symbols do not have an underscore
|
||||
prepended. */
|
||||
#define USER_LABEL_PREFIX ""
|
||||
|
||||
/* This is how to output an insn to push a register on the stack. */
|
||||
#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
|
||||
do { \
|
||||
if (TARGET_SCORE7) \
|
||||
fprintf (STREAM, "\tpush! %s,[%s]\n", \
|
||||
reg_names[REGNO], \
|
||||
reg_names[STACK_POINTER_REGNUM]); \
|
||||
} while (0)
|
||||
|
||||
/* This is how to output an insn to pop a register from the stack. */
|
||||
#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
|
||||
do { \
|
||||
if (TARGET_SCORE7) \
|
||||
fprintf (STREAM, "\tpop! %s,[%s]\n", \
|
||||
reg_names[REGNO], \
|
||||
reg_names[STACK_POINTER_REGNUM]); \
|
||||
} while (0)
|
||||
|
||||
/* Output of Dispatch Tables. */
|
||||
/* This is how to output an element of a case-vector. We can make the
|
||||
entries PC-relative in GP-relative when .gp(d)word is supported. */
|
||||
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
|
||||
do { \
|
||||
if (TARGET_SCORE7) \
|
||||
{ \
|
||||
if (flag_pic) \
|
||||
fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
|
||||
else \
|
||||
fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
|
||||
#define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
|
||||
: GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
|
||||
|
||||
/* This is how to output a label which precedes a jumptable. Since
|
||||
Score3 instructions are 2 bytes, we may need explicit alignment here. */
|
||||
#undef ASM_OUTPUT_CASE_LABEL
|
||||
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
|
||||
do { \
|
||||
if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \
|
||||
ASM_OUTPUT_ALIGN (FILE, 2); \
|
||||
(*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
|
||||
} while (0)
|
||||
|
||||
/* Specify the machine mode that this machine uses
|
||||
for the index in the tablejump instruction. */
|
||||
#define CASE_VECTOR_MODE SImode
|
||||
|
||||
/* This is how to output an element of a case-vector that is absolute. */
|
||||
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
|
||||
fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
|
||||
|
||||
/* Assembler Commands for Exception Regions */
|
||||
/* Since the S+core is encoded in the least-significant bit
|
||||
of the address, mask it off return addresses for purposes of
|
||||
finding exception handling regions. */
|
||||
#define MASK_RETURN_ADDR constm1_rtx
|
||||
|
||||
/* Assembler Commands for Alignment */
|
||||
/* This is how to output an assembler line to advance the location
|
||||
counter by SIZE bytes. */
|
||||
#undef ASM_OUTPUT_SKIP
|
||||
#define ASM_OUTPUT_SKIP(STREAM, SIZE) \
|
||||
fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
|
||||
|
||||
/* This is how to output an assembler line
|
||||
that says to advance the location counter
|
||||
to a multiple of 2**LOG bytes. */
|
||||
#define ASM_OUTPUT_ALIGN(STREAM, LOG) \
|
||||
fprintf (STREAM, "\t.align\t%d\n", (LOG))
|
||||
|
||||
/* Macros Affecting All Debugging Formats. */
|
||||
#ifndef PREFERRED_DEBUGGING_TYPE
|
||||
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
|
||||
#endif
|
||||
|
||||
/* Specific Options for DBX Output. */
|
||||
#define DBX_DEBUGGING_INFO 1
|
||||
|
||||
/* By default, turn on GDB extensions. */
|
||||
#define DEFAULT_GDB_EXTENSIONS 1
|
||||
|
||||
#define DBX_CONTIN_LENGTH 0
|
||||
|
||||
/* File Names in DBX Format. */
|
||||
#define DWARF2_DEBUGGING_INFO 1
|
||||
|
||||
/* The DWARF 2 CFA column which tracks the return address. */
|
||||
#define DWARF_FRAME_RETURN_COLUMN 3
|
||||
|
||||
/* Define if operations between registers always perform the operation
|
||||
on the full register even if a narrower mode is specified. */
|
||||
#define WORD_REGISTER_OPERATIONS
|
||||
|
||||
/* All references are zero extended. */
|
||||
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
||||
|
||||
/* Define if loading short immediate values into registers sign extends. */
|
||||
#define SHORT_IMMEDIATES_SIGN_EXTEND
|
||||
|
||||
/* Max number of bytes we can move from memory to memory
|
||||
in one reasonably fast instruction. */
|
||||
#define MOVE_MAX 4
|
||||
|
||||
/* Define this to be nonzero if shift instructions ignore all but the low-order
|
||||
few bits. */
|
||||
#define SHIFT_COUNT_TRUNCATED 1
|
||||
|
||||
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
||||
is done just by pretending it is already truncated. */
|
||||
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
||||
|
||||
/* Specify the machine mode that pointers have.
|
||||
After generation of rtl, the compiler makes no further distinction
|
||||
between pointers and any other objects of this machine mode. */
|
||||
#define Pmode SImode
|
||||
|
||||
/* Give call MEMs SImode since it is the "most permissive" mode
|
||||
for 32-bit targets. */
|
||||
#define FUNCTION_MODE Pmode
|
||||
|
||||
struct GTY ((chain_next ("%h.next"))) extern_list
|
||||
{
|
||||
struct extern_list *next; /* next external */
|
||||
const char *name; /* name of the external */
|
||||
int size; /* size in bytes */
|
||||
};
|
||||
|
||||
extern GTY (()) struct extern_list *extern_head;
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,57 +0,0 @@
|
||||
; Options for the Sunnorth port of the compiler.
|
||||
|
||||
; Copyright (C) 2005-2014 Free Software Foundation, Inc.
|
||||
;
|
||||
; This file is part of GCC.
|
||||
;
|
||||
; GCC is free software; you can redistribute it and/or modify it under
|
||||
; the terms of the GNU General Public License as published by the Free
|
||||
; Software Foundation; either version 3, or (at your option) any later
|
||||
; version.
|
||||
;
|
||||
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
; for more details.
|
||||
;
|
||||
; You should have received a copy of the GNU General Public License
|
||||
; along with GCC; see the file COPYING3. If not see
|
||||
; <http://www.gnu.org/licenses/>.
|
||||
|
||||
meb
|
||||
Target RejectNegative Report InverseMask(LITTLE_ENDIAN)
|
||||
Generate big-endian code
|
||||
|
||||
mel
|
||||
Target RejectNegative Report Mask(LITTLE_ENDIAN)
|
||||
Generate little-endian code
|
||||
|
||||
mnhwloop
|
||||
Target RejectNegative Report Mask(NHWLOOP)
|
||||
Disable bcnz instruction
|
||||
|
||||
muls
|
||||
Target RejectNegative Report Mask(ULS)
|
||||
Enable unaligned load/store instruction
|
||||
|
||||
mscore7
|
||||
Target RejectNegative Report Mask(SCORE7)
|
||||
Support SCORE 7 ISA
|
||||
|
||||
mscore7d
|
||||
Target RejectNegative Report Mask(SCORE7D)
|
||||
Support SCORE 7D ISA
|
||||
|
||||
march=
|
||||
Target RejectNegative Joined Enum(score_arch)
|
||||
Specify the name of the target architecture
|
||||
|
||||
Enum
|
||||
Name(score_arch) Type(int)
|
||||
Known SCORE architectures (for use with the -march= option):
|
||||
|
||||
EnumValue
|
||||
Enum(score_arch) String(score7) Value(MASK_SCORE7)
|
||||
|
||||
EnumValue
|
||||
Enum(score_arch) String(score7d) Value(MASK_SCORE7 | MASK_SCORE7D)
|
||||
@ -3673,75 +3673,6 @@ Shift count operand.
|
||||
|
||||
@end table
|
||||
|
||||
@item Score family---@file{config/score/score.h}
|
||||
@table @code
|
||||
@item d
|
||||
Registers from r0 to r32.
|
||||
|
||||
@item e
|
||||
Registers from r0 to r16.
|
||||
|
||||
@item t
|
||||
r8---r11 or r22---r27 registers.
|
||||
|
||||
@item h
|
||||
hi register.
|
||||
|
||||
@item l
|
||||
lo register.
|
||||
|
||||
@item x
|
||||
hi + lo register.
|
||||
|
||||
@item q
|
||||
cnt register.
|
||||
|
||||
@item y
|
||||
lcb register.
|
||||
|
||||
@item z
|
||||
scb register.
|
||||
|
||||
@item a
|
||||
cnt + lcb + scb register.
|
||||
|
||||
@item c
|
||||
cr0---cr15 register.
|
||||
|
||||
@item b
|
||||
cp1 registers.
|
||||
|
||||
@item f
|
||||
cp2 registers.
|
||||
|
||||
@item i
|
||||
cp3 registers.
|
||||
|
||||
@item j
|
||||
cp1 + cp2 + cp3 registers.
|
||||
|
||||
@item I
|
||||
High 16-bit constant (32-bit constant with 16 LSBs zero).
|
||||
|
||||
@item J
|
||||
Unsigned 5 bit integer (in the range 0 to 31).
|
||||
|
||||
@item K
|
||||
Unsigned 16 bit integer (in the range 0 to 65535).
|
||||
|
||||
@item L
|
||||
Signed 16 bit integer (in the range @minus{}32768 to 32767).
|
||||
|
||||
@item M
|
||||
Unsigned 14 bit integer (in the range 0 to 16383).
|
||||
|
||||
@item N
|
||||
Signed 14 bit integer (in the range @minus{}8192 to 8191).
|
||||
|
||||
@item Z
|
||||
Any SYMBOL_REF.
|
||||
@end table
|
||||
|
||||
@item Xstormy16---@file{config/stormy16/stormy16.h}
|
||||
@table @code
|
||||
@item a
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
// PR c++/49673: check that test_data goes into .rodata
|
||||
// { dg-do compile { target c++11 } }
|
||||
// { dg-additional-options -G0 { target { { alpha*-*-* frv*-*-* ia64-*-* lm32*-*-* m32r*-*-* microblaze*-*-* mips*-*-* nios2-*-* powerpc*-*-* rs6000*-*-* score*-*-* } && { ! { *-*-darwin* *-*-aix* alpha*-*-*vms* } } } } }
|
||||
// { dg-additional-options -G0 { target { { alpha*-*-* frv*-*-* ia64-*-* lm32*-*-* m32r*-*-* microblaze*-*-* mips*-*-* nios2-*-* powerpc*-*-* rs6000*-*-* } && { ! { *-*-darwin* *-*-aix* alpha*-*-*vms* } } } } }
|
||||
// { dg-final { scan-assembler "\\.rdata" { target mips*-*-* } } }
|
||||
// { dg-final { scan-assembler "rodata" { target { { *-*-linux-gnu *-*-gnu* *-*-elf } && { ! mips*-*-* } } } } }
|
||||
|
||||
|
||||
@ -1,3 +1,7 @@
|
||||
2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
|
||||
|
||||
* config.host: Remove support for score-*.
|
||||
|
||||
2014-09-22 Joseph Myers <joseph@codesourcery.com>
|
||||
|
||||
* dfp-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
|
||||
|
||||
@ -167,9 +167,6 @@ powerpc*-*-*)
|
||||
;;
|
||||
rs6000*-*-*)
|
||||
;;
|
||||
score*-*-*)
|
||||
cpu_type=score
|
||||
;;
|
||||
sparc64*-*-*)
|
||||
cpu_type=sparc
|
||||
;;
|
||||
@ -1051,10 +1048,6 @@ s390x-ibm-tpf*)
|
||||
extra_parts="crtbeginS.o crtendS.o"
|
||||
md_unwind_header=s390/tpf-unwind.h
|
||||
;;
|
||||
score-*-elf)
|
||||
tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl t-softfp"
|
||||
extra_parts="$extra_parts crti.o crtn.o"
|
||||
;;
|
||||
sh-*-elf* | sh[12346l]*-*-elf*)
|
||||
tmake_file="$tmake_file sh/t-sh t-crtstuff-pic t-fdpbit"
|
||||
extra_parts="$extra_parts crt1.o crti.o crtn.o crtbeginS.o crtendS.o \
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user