From 3bffc4b37e85c7f6092dfb0fbe4067d268e97b46 Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Mon, 19 Apr 2021 16:56:31 +0100 Subject: [PATCH] arm: partial revert of r11-8168 [PR100067] This is a partial revert of r11-8168. The overall purpose of the commit is retained (to fix a bogus warning when -mfpu= is used in combination with eg -mcpu=neoverse-v1), but it removes the hunk that changed the subsequent feature bits for features of a simd/fp unit that cannot be described by -mfpu. While I still think that is the correct direction of travel, it's somewhat disruptive and not appropriate for late stage4. I'll revisit for gcc-12. gcc: PR target/100067 * config/arm/arm.c (arm_configure_build_target): Do not strip extended FPU/SIMD feature bits from the target ISA when -mfpu is specified (partial revert of r11-8168). --- gcc/config/arm/arm.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 475fb0d827f4..340f7c95d76b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3396,9 +3396,11 @@ arm_configure_build_target (struct arm_build_target *target, auto_sbitmap fpu_bits (isa_num_bits); arm_initialize_isa (fpu_bits, arm_selected_fpu->isa_bits); - /* Clear out ALL bits relating to the FPU/simd extensions, to avoid - potentially invalid combinations later on that we can't match. */ - bitmap_and_compl (target->isa, target->isa, isa_all_fpbits); + /* This should clear out ALL bits relating to the FPU/simd + extensions, to avoid potentially invalid combinations later on + that we can't match. At present we only clear out those bits + that can be set by -mfpu. This should be fixed in GCC-12. */ + bitmap_and_compl (target->isa, target->isa, isa_all_fpubits_internal); bitmap_ior (target->isa, target->isa, fpu_bits); }