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re PR target/62011 (False Data Dependency in popcnt instruction)
PR target/62011 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): New tune flag. * config/i386/i386.h (TARGET_AVOID_FALSE_DEP_FOR_BMI): New define. * config/i386/i386.md (unspec) <UNSPEC_INSN_FALSE_DEP>: New unspec. (ffs<mode>2): Do not expand with tzcnt for TARGET_AVOID_FALSE_DEP_FOR_BMI. (ffssi2_no_cmove): Ditto. (*tzcnt<mode>_1): Disable for TARGET_AVOID_FALSE_DEP_FOR_BMI. (ctz<mode>2): New expander. (*ctz<mode>2_falsedep_1): New insn_and_split pattern. (*ctz<mode>2_falsedep): New insn. (*ctz<mode>2): Rename from ctz<mode>2. (clz<mode>2_lzcnt): New expander. (*clz<mode>2_lzcnt_falsedep_1): New insn_and_split pattern. (*clz<mode>2_lzcnt_falsedep): New insn. (*clz<mode>2): Rename from ctz<mode>2. (popcount<mode>2): New expander. (*popcount<mode>2_falsedep_1): New insn_and_split pattern. (*popcount<mode>2_falsedep): New insn. (*popcount<mode>2): Rename from ctz<mode>2. (*popcount<mode>2_cmp): Remove. (*popcountsi2_cmp_zext): Ditto. From-SVN: r214112
This commit is contained in:
Uros Bizjak
Uros Bizjak
parent
d6b0bb1c4e
commit
374f5bf801
@ -1,3 +1,29 @@
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2014-08-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/62011
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* config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
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New tune flag.
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* config/i386/i386.h (TARGET_AVOID_FALSE_DEP_FOR_BMI): New define.
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* config/i386/i386.md (unspec) <UNSPEC_INSN_FALSE_DEP>: New unspec.
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(ffs<mode>2): Do not expand with tzcnt for
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TARGET_AVOID_FALSE_DEP_FOR_BMI.
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(ffssi2_no_cmove): Ditto.
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(*tzcnt<mode>_1): Disable for TARGET_AVOID_FALSE_DEP_FOR_BMI.
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(ctz<mode>2): New expander.
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(*ctz<mode>2_falsedep_1): New insn_and_split pattern.
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(*ctz<mode>2_falsedep): New insn.
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(*ctz<mode>2): Rename from ctz<mode>2.
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(clz<mode>2_lzcnt): New expander.
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(*clz<mode>2_lzcnt_falsedep_1): New insn_and_split pattern.
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(*clz<mode>2_lzcnt_falsedep): New insn.
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(*clz<mode>2): Rename from ctz<mode>2.
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(popcount<mode>2): New expander.
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(*popcount<mode>2_falsedep_1): New insn_and_split pattern.
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(*popcount<mode>2_falsedep): New insn.
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(*popcount<mode>2): Rename from ctz<mode>2.
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(*popcount<mode>2_cmp): Remove.
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(*popcountsi2_cmp_zext): Ditto.
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2014-08-18 Ajit Agarwal <ajitkum@xilinx.com>
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* config/microblaze/microblaze.c (microblaze_elf_asm_cdtor): New.
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@ -473,6 +473,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
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ix86_tune_features[X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS]
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#define TARGET_ADJUST_UNROLL \
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ix86_tune_features[X86_TUNE_ADJUST_UNROLL]
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#define TARGET_AVOID_FALSE_DEP_FOR_BMI \
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ix86_tune_features[X86_TUNE_AVOID_FALSE_DEP_FOR_BMI]
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/* Feature tests against the various architecture variations. */
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enum ix86_arch_indices {
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@ -112,6 +112,7 @@
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UNSPEC_XBEGIN_ABORT
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UNSPEC_STOS
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UNSPEC_PEEPSIB
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UNSPEC_INSN_FALSE_DEP
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;; For SSE/MMX support:
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UNSPEC_FIX_NOTRUNC
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@ -12197,7 +12198,8 @@
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DONE;
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}
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flags_mode = TARGET_BMI ? CCCmode : CCZmode;
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flags_mode
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= (TARGET_BMI && !TARGET_AVOID_FALSE_DEP_FOR_BMI) ? CCCmode : CCZmode;
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operands[2] = gen_reg_rtx (<MODE>mode);
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operands[3] = gen_rtx_REG (flags_mode, FLAGS_REG);
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@ -12223,7 +12225,8 @@
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(parallel [(set (match_dup 0) (plus:SI (match_dup 0) (const_int 1)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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enum machine_mode flags_mode = TARGET_BMI ? CCCmode : CCZmode;
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enum machine_mode flags_mode
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= (TARGET_BMI && !TARGET_AVOID_FALSE_DEP_FOR_BMI) ? CCCmode : CCZmode;
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operands[3] = gen_lowpart (QImode, operands[2]);
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operands[4] = gen_rtx_REG (flags_mode, FLAGS_REG);
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@ -12238,7 +12241,7 @@
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(const_int 0)))
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(set (match_operand:SWI48 0 "register_operand" "=r")
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(ctz:SWI48 (match_dup 1)))]
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"TARGET_BMI"
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"TARGET_BMI && !TARGET_AVOID_FALSE_DEP_FOR_BMI"
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"tzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
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[(set_attr "type" "alu1")
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(set_attr "prefix_0f" "1")
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@ -12259,7 +12262,52 @@
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(set_attr "btver2_decode" "double")
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(set_attr "mode" "<MODE>")])
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(define_insn "ctz<mode>2"
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(define_expand "ctz<mode>2"
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[(parallel
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[(set (match_operand:SWI248 0 "register_operand")
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(ctz:SWI248
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(match_operand:SWI248 1 "nonimmediate_operand")))
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(clobber (reg:CC FLAGS_REG))])])
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(define_insn_and_split "*ctz<mode>2_falsedep_1"
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[(set (match_operand:SWI48 0 "register_operand" "=&r")
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(ctz:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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"(TARGET_BMI || TARGET_GENERIC)
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&& TARGET_AVOID_FALSE_DEP_FOR_BMI && optimize_function_for_speed_p (cfun)"
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"#"
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"&& reload_completed"
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[(parallel
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[(set (match_dup 0)
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(ctz:SWI48 (match_dup 1)))
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(unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))])]
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"ix86_expand_clear (operands[0]);")
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(define_insn "*ctz<mode>2_falsedep"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(ctz:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(unspec [(match_operand:SWI48 2 "register_operand" "0")]
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UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))]
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""
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{
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if (TARGET_BMI)
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return "tzcnt{<imodesuffix>}\t{%1, %0|%0, %1}";
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else if (TARGET_GENERIC)
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/* tzcnt expands to 'rep bsf' and we can use it even if !TARGET_BMI. */
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return "rep%; bsf{<imodesuffix>}\t{%1, %0|%0, %1}";
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else
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gcc_unreachable ();
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}
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[(set_attr "type" "alu1")
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(set_attr "prefix_0f" "1")
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(set_attr "prefix_rep" "1")
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(set_attr "mode" "<MODE>")])
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(define_insn "*ctz<mode>2"
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[(set (match_operand:SWI248 0 "register_operand" "=r")
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(ctz:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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@ -12306,7 +12354,44 @@
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operands[2] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode)-1);
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})
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(define_insn "clz<mode>2_lzcnt"
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(define_expand "clz<mode>2_lzcnt"
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[(parallel
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[(set (match_operand:SWI248 0 "register_operand")
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(clz:SWI248
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(match_operand:SWI248 1 "nonimmediate_operand")))
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(clobber (reg:CC FLAGS_REG))])]
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"TARGET_LZCNT")
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(define_insn_and_split "*clz<mode>2_lzcnt_falsedep_1"
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[(set (match_operand:SWI48 0 "register_operand" "=&r")
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(clz:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_LZCNT
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&& TARGET_AVOID_FALSE_DEP_FOR_BMI && optimize_function_for_speed_p (cfun)"
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"#"
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"&& reload_completed"
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[(parallel
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[(set (match_dup 0)
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(clz:SWI48 (match_dup 1)))
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(unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))])]
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"ix86_expand_clear (operands[0]);")
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(define_insn "*clz<mode>2_lzcnt_falsedep"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(clz:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(unspec [(match_operand:SWI48 2 "register_operand" "0")]
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UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_LZCNT"
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"lzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
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[(set_attr "prefix_rep" "1")
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(set_attr "type" "bitmanip")
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(set_attr "mode" "<MODE>")])
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(define_insn "*clz<mode>2_lzcnt"
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[(set (match_operand:SWI248 0 "register_operand" "=r")
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(clz:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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@ -12589,7 +12674,50 @@
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(set_attr "prefix_0f" "1")
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(set_attr "mode" "HI")])
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(define_insn "popcount<mode>2"
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(define_expand "popcount<mode>2"
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[(parallel
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[(set (match_operand:SWI248 0 "register_operand")
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(popcount:SWI248
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(match_operand:SWI248 1 "nonimmediate_operand")))
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(clobber (reg:CC FLAGS_REG))])]
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"TARGET_POPCNT")
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(define_insn_and_split "*popcount<mode>2_falsedep_1"
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[(set (match_operand:SWI48 0 "register_operand" "=&r")
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(popcount:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_POPCNT
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&& TARGET_AVOID_FALSE_DEP_FOR_BMI && optimize_function_for_speed_p (cfun)"
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"#"
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"&& reload_completed"
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[(parallel
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[(set (match_dup 0)
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(popcount:SWI48 (match_dup 1)))
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(unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))])]
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"ix86_expand_clear (operands[0]);")
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(define_insn "*popcount<mode>2_falsedep"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(popcount:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(unspec [(match_operand:SWI48 2 "register_operand" "0")]
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UNSPEC_INSN_FALSE_DEP)
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_POPCNT"
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{
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#if TARGET_MACHO
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return "popcnt\t{%1, %0|%0, %1}";
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#else
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return "popcnt{<imodesuffix>}\t{%1, %0|%0, %1}";
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#endif
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}
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[(set_attr "prefix_rep" "1")
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(set_attr "type" "bitmanip")
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(set_attr "mode" "<MODE>")])
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(define_insn "*popcount<mode>2"
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[(set (match_operand:SWI248 0 "register_operand" "=r")
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(popcount:SWI248
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(match_operand:SWI248 1 "nonimmediate_operand" "rm")))
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@ -12606,45 +12734,6 @@
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(set_attr "type" "bitmanip")
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(set_attr "mode" "<MODE>")])
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(define_insn "*popcount<mode>2_cmp"
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[(set (reg FLAGS_REG)
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(compare
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(popcount:SWI248
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(match_operand:SWI248 1 "nonimmediate_operand" "rm"))
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(const_int 0)))
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(set (match_operand:SWI248 0 "register_operand" "=r")
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(popcount:SWI248 (match_dup 1)))]
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"TARGET_POPCNT && ix86_match_ccmode (insn, CCZmode)"
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{
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#if TARGET_MACHO
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return "popcnt\t{%1, %0|%0, %1}";
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#else
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return "popcnt{<imodesuffix>}\t{%1, %0|%0, %1}";
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#endif
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}
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[(set_attr "prefix_rep" "1")
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(set_attr "type" "bitmanip")
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(set_attr "mode" "<MODE>")])
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(define_insn "*popcountsi2_cmp_zext"
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[(set (reg FLAGS_REG)
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(compare
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(popcount:SI (match_operand:SI 1 "nonimmediate_operand" "rm"))
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(const_int 0)))
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(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI(popcount:SI (match_dup 1))))]
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"TARGET_64BIT && TARGET_POPCNT && ix86_match_ccmode (insn, CCZmode)"
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{
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#if TARGET_MACHO
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return "popcnt\t{%1, %0|%0, %1}";
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#else
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return "popcnt{l}\t{%1, %0|%0, %1}";
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#endif
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}
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[(set_attr "prefix_rep" "1")
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(set_attr "type" "bitmanip")
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(set_attr "mode" "SI")])
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(define_expand "bswapdi2"
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[(set (match_operand:DI 0 "register_operand")
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(bswap:DI (match_operand:DI 1 "nonimmediate_operand")))]
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@ -509,6 +509,11 @@ DEF_TUNE (X86_TUNE_NOT_VECTORMODE, "not_vectormode", m_K6)
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DEF_TUNE (X86_TUNE_AVOID_VECTOR_DECODE, "avoid_vector_decode",
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m_K8)
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/* X86_TUNE_AVOID_FALSE_DEP_FOR_BMI: Avoid false dependency
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for bit-manipulation instructions. */
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DEF_TUNE (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, "avoid_false_dep_for_bmi",
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m_SANDYBRIDGE | m_HASWELL | m_GENERIC)
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/*****************************************************************************/
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/* This never worked well before. */
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/*****************************************************************************/
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