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arm-protos.h (thumb1_legitimate_address_p): New prototype.

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* config/arm/arm-protos.h (thumb1_legitimate_address_p): New prototype.
	* config/arm/arm.c (thumb1_legitimate_address_p): Remove the static
	linkage.
	* config/arm/constraints.md (Uu): New constraint.
	* config/arm/arm.md (*arm_movqi_insn): Compute attr "length".

From-SVN: r172697
This commit is contained in:
Wei Guozhi 2011-04-19 08:46:54 +00:00 committed by Wei Guozhi
parent 18a24fed72
commit 363ee90e13
5 changed files with 29 additions and 6 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2011-04-19 Wei Guozhi <carrot@google.com>
PR target/47855
* config/arm/arm-protos.h (thumb1_legitimate_address_p): New prototype.
* config/arm/arm.c (thumb1_legitimate_address_p): Remove the static
linkage.
* config/arm/constraints.md (Uu): New constraint.
* config/arm/arm.md (*arm_movqi_insn): Compute attr "length".
2011-04-19 Tristan Gingold <gingold@adacore.com>
* config.gcc (-*-*-*vms): Added.

1
gcc/config/arm/arm-protos.h
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@ -58,6 +58,7 @@ extern bool arm_legitimize_reload_address (rtx *, enum machine_mode, int, int,
int);
extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int,
int);
extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int);
extern int arm_const_double_rtx (rtx);
extern int neg_const_double_rtx_ok_for_fpa (rtx);
extern int vfp3_const_double_rtx (rtx);

2
gcc/config/arm/arm.c
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@ -5775,7 +5775,7 @@ thumb1_index_register_rtx_p (rtx x, int strict_p)
addresses based on the frame pointer or arg pointer until the
reload pass starts. This is so that eliminating such addresses
into stack based ones won't produce impossible code. */
static int
int
thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p)
{
/* ??? Not clear if this is right. Experiment. */

14
gcc/config/arm/arm.md
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@ -5946,8 +5946,8 @@
(define_insn "*arm_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m")
(match_operand:QI 1 "general_operand" "rI,K,m,r"))]
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,l,Uu,r,m")
(match_operand:QI 1 "general_operand" "rI,K,Uu,l,m,r"))]
"TARGET_32BIT
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
@ -5955,10 +5955,14 @@
mov%?\\t%0, %1
mvn%?\\t%0, #%B1
ldr%(b%)\\t%0, %1
str%(b%)\\t%1, %0
ldr%(b%)\\t%0, %1
str%(b%)\\t%1, %0"
[(set_attr "type" "*,*,load1,store1")
(set_attr "insn" "mov,mvn,*,*")
(set_attr "predicable" "yes")]
[(set_attr "type" "*,*,load1,store1,load1,store1")
(set_attr "insn" "mov,mvn,*,*,*,*")
(set_attr "predicable" "yes")
(set_attr "arch" "any,any,t2,t2,any,any")
(set_attr "length" "4,4,2,2,4,4")]
)
(define_insn "*thumb1_movqi_insn"

9
gcc/config/arm/constraints.md
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@ -36,6 +36,7 @@
;; The following memory constraints have been used:
;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
;; in ARM state: Uq
;; in Thumb state: Uu
(define_register_constraint "f" "TARGET_ARM ? FPA_REGS : NO_REGS"
@ -332,6 +333,14 @@
(and (match_code "mem")
(match_test "REG_P (XEXP (op, 0))")))
(define_memory_constraint "Uu"
"@internal
In Thumb state an address that is valid in 16bit encoding."
(and (match_code "mem")
(match_test "TARGET_THUMB
&& thumb1_legitimate_address_p (GET_MODE (op), XEXP (op, 0),
0)")))
;; We used to have constraint letters for S and R in ARM state, but
;; all uses of these now appear to have been removed.