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[amdgcn] Restrict registers available to non-kernel functions
Restrict the number of SGPRs and VGPRs available to non-kernel functions to improve compute-unit occupancy with multiple threads. 2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com> gcc/ * config/gcn/gcn.c (default_requested_args): New. (gcn_parse_amdgpu_hsa_kernel_attribute): Initialize requested args set with default_requested_args. (gcn_conditional_register_usage): Limit register usage of non-kernel functions. Reassign fixed registers if a non-standard set of args is requested. * config/gcn/gcn.h (FIXED_REGISTERS): Fix registers according to ABI. From-SVN: r278301
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Kwok Cheung Yeung
Kwok Cheung Yeung
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1c3c3f4550
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@ -1,3 +1,13 @@
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2019-11-15 Kwok Cheung Yeung <kcy@codesourcery.com>
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* config/gcn/gcn.c (default_requested_args): New.
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(gcn_parse_amdgpu_hsa_kernel_attribute): Initialize requested args
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set with default_requested_args.
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(gcn_conditional_register_usage): Limit register usage of non-kernel
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functions. Reassign fixed registers if a non-standard set of args is
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requested.
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* config/gcn/gcn.h (FIXED_REGISTERS): Fix registers according to ABI.
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2019-11-15 Feng Xue <fxue@os.amperecomputing.com>
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PR ipa/92528
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@ -191,6 +191,17 @@ static const struct gcn_kernel_arg_type
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{"work_item_id_Z", NULL, V64SImode, FIRST_VGPR_REG + 2}
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};
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static const long default_requested_args
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= (1 << PRIVATE_SEGMENT_BUFFER_ARG)
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| (1 << DISPATCH_PTR_ARG)
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| (1 << QUEUE_PTR_ARG)
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| (1 << KERNARG_SEGMENT_PTR_ARG)
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| (1 << PRIVATE_SEGMENT_WAVE_OFFSET_ARG)
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| (1 << WORKGROUP_ID_X_ARG)
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| (1 << WORK_ITEM_ID_X_ARG)
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| (1 << WORK_ITEM_ID_Y_ARG)
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| (1 << WORK_ITEM_ID_Z_ARG);
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/* Extract parameter settings from __attribute__((amdgpu_hsa_kernel ())).
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This function also sets the default values for some arguments.
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@ -201,10 +212,7 @@ gcn_parse_amdgpu_hsa_kernel_attribute (struct gcn_kernel_args *args,
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tree list)
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{
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bool err = false;
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args->requested = ((1 << PRIVATE_SEGMENT_BUFFER_ARG)
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| (1 << QUEUE_PTR_ARG)
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| (1 << KERNARG_SEGMENT_PTR_ARG)
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| (1 << PRIVATE_SEGMENT_WAVE_OFFSET_ARG));
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args->requested = default_requested_args;
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args->nargs = 0;
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for (int a = 0; a < GCN_KERNEL_ARG_TYPES; a++)
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@ -242,8 +250,6 @@ gcn_parse_amdgpu_hsa_kernel_attribute (struct gcn_kernel_args *args,
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args->requested |= (1 << a);
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args->order[args->nargs++] = a;
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}
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args->requested |= (1 << WORKGROUP_ID_X_ARG);
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args->requested |= (1 << WORK_ITEM_ID_Z_ARG);
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/* Requesting WORK_ITEM_ID_Z_ARG implies requesting WORK_ITEM_ID_X_ARG and
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WORK_ITEM_ID_Y_ARG. Similarly, requesting WORK_ITEM_ID_Y_ARG implies
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@ -253,10 +259,6 @@ gcn_parse_amdgpu_hsa_kernel_attribute (struct gcn_kernel_args *args,
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if (args->requested & (1 << WORK_ITEM_ID_Y_ARG))
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args->requested |= (1 << WORK_ITEM_ID_X_ARG);
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/* Always enable this so that kernargs is in a predictable place for
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gomp_print, etc. */
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args->requested |= (1 << DISPATCH_PTR_ARG);
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int sgpr_regno = FIRST_SGPR_REG;
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args->nsgprs = 0;
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for (int a = 0; a < GCN_KERNEL_ARG_TYPES; a++)
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@ -2045,27 +2047,34 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
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static void
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gcn_conditional_register_usage (void)
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{
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int i;
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if (!cfun || !cfun->machine)
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return;
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/* FIXME: Do we need to reset fixed_regs? */
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/* Limit ourselves to 1/16 the register file for maximimum sized workgroups.
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There are enough SGPRs not to limit those.
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TODO: Adjust this more dynamically. */
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for (i = FIRST_VGPR_REG + 64; i <= LAST_VGPR_REG; i++)
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fixed_regs[i] = 1, call_used_regs[i] = 1;
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if (!cfun || !cfun->machine || cfun->machine->normal_function)
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if (cfun->machine->normal_function)
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{
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/* Normal functions can't know what kernel argument registers are
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live, so just fix the bottom 16 SGPRs, and bottom 3 VGPRs. */
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for (i = 0; i < 16; i++)
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fixed_regs[FIRST_SGPR_REG + i] = 1;
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for (i = 0; i < 3; i++)
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fixed_regs[FIRST_VGPR_REG + i] = 1;
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/* Restrict the set of SGPRs and VGPRs used by non-kernel functions. */
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for (int i = SGPR_REGNO (62); i <= LAST_SGPR_REG; i++)
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fixed_regs[i] = 1, call_used_regs[i] = 1;
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for (int i = VGPR_REGNO (24); i <= LAST_VGPR_REG; i++)
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fixed_regs[i] = 1, call_used_regs[i] = 1;
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return;
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}
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/* If the set of requested args is the default set, nothing more needs to
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be done. */
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if (cfun->machine->args.requested == default_requested_args)
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return;
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/* Requesting a set of args different from the default violates the ABI. */
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if (!leaf_function_p ())
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warning (0, "A non-default set of initial values has been requested, "
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"which violates the ABI!");
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for (int i = SGPR_REGNO (0); i < SGPR_REGNO (14); i++)
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fixed_regs[i] = 0;
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/* Fix the runtime argument register containing values that may be
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needed later. DISPATCH_PTR_ARG and FLAT_SCRATCH_* should not be
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needed after the prologue so there's no need to fix them. */
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@ -2073,10 +2082,10 @@ gcn_conditional_register_usage (void)
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fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_WAVE_OFFSET_ARG]] = 1;
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if (cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] >= 0)
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{
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/* The upper 32-bits of the 64-bit descriptor are not used, so allow
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the containing registers to be used for other purposes. */
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fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG]] = 1;
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fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 1] = 1;
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fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 2] = 1;
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fixed_regs[cfun->machine->args.reg[PRIVATE_SEGMENT_BUFFER_ARG] + 3] = 1;
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}
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if (cfun->machine->args.reg[KERNARG_SEGMENT_PTR_ARG] >= 0)
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{
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@ -160,9 +160,9 @@
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#define FIXED_REGISTERS { \
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/* Scalars. */ \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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1, 1, 0, 0, 1, 1, 0, 0, 1, 1, \
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/* fp sp lr. */ \
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0, 0, 0, 0, 1, 1, 1, 1, 0, 0, \
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1, 1, 0, 0, 1, 1, 1, 1, 0, 0, \
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/* exec_save, cc_save */ \
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1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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@ -180,7 +180,7 @@
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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/* VGRPs */ \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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