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rs6000.md (define_attr type): Remove altivec.
* config/rs6000/rs6000.md (define_attr type): Remove altivec.
* config/rs6000/altivec.md (movv4si_internal): Set correct instruction
attributes.
(movv8hi_internal,movv16qi_internal,movv4sf_internal): Same.
(get_vrsave_internal,set_vrsave_internal): Same.
(altivec_vspltisb,altivec_vspltish,altivec_vspltisw): Same.
(absv16qi2,absv8hi2,absv4si2,absv4sf2): Same
(altivec_abss_v16qi,altivec_abss_v8hi,altivec_abss_v4si): Same.
From-SVN: r60339
This commit is contained in:
David Edelsohn
David Edelsohn
parent
e91f04de4b
commit
310b9b1d76
@ -1,3 +1,14 @@
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2002-12-19 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/rs6000.md (define_attr type): Remove altivec.
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* config/rs6000/altivec.md (movv4si_internal): Set correct instruction
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attributes.
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(movv8hi_internal,movv16qi_internal,movv4sf_internal): Same.
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(get_vrsave_internal,set_vrsave_internal): Same.
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(altivec_vspltisb,altivec_vspltish,altivec_vspltisw): Same.
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(absv16qi2,absv8hi2,absv4si2,absv4sf2): Same
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(altivec_abss_v16qi,altivec_abss_v8hi,altivec_abss_v4si): Same.
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2002-12-19 Casper S. Hornstrup <chorns@users.sourceforge.net>
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Danny Smith <dannysmith@users.sourceforge.net>
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Eric Kohl <ekohl@rz-online.de>
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@ -95,7 +95,7 @@
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stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
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lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
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mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*")
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(set_attr "length" "*,*,*,16,16,16")])
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(define_expand "movv8hi"
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@ -115,7 +115,7 @@
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stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
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lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
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mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*")
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(set_attr "length" "*,*,*,16,16,16")])
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(define_expand "movv16qi"
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@ -132,10 +132,10 @@
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stvx %1,%y0
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lvx %0,%y1
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vor %0,%1,%1
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stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
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lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
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mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
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[(set_attr "type" "altivec")
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stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
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lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
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mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
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[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*")
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(set_attr "length" "*,*,*,16,16,16")])
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(define_expand "movv4sf"
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@ -155,7 +155,7 @@
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stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
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lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
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mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*")
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(set_attr "length" "*,*,*,16,16,16")])
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(define_insn "get_vrsave_internal"
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@ -169,7 +169,7 @@
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else
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return \"mfvrsave %0\";
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}"
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[(set_attr "type" "altivec")])
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[(set_attr "type" "*")])
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(define_insn "*set_vrsave_internal"
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[(match_parallel 0 "vrsave_operation"
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@ -184,7 +184,7 @@
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else
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return \"mtvrsave %1\";
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}"
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[(set_attr "type" "altivec")])
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[(set_attr "type" "*")])
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;; Vector clears
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(define_insn "*movv4si_const0"
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@ -1299,29 +1299,28 @@
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(unspec:V16QI [(match_operand:QI 1 "immediate_operand" "i")] 139))]
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"TARGET_ALTIVEC"
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"vspltisb %0, %1"
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[(set_attr "type" "vecsimple")])
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[(set_attr "type" "vecperm")])
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(define_insn "altivec_vspltish"
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[(set (match_operand:V8HI 0 "register_operand" "=v")
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(unspec:V8HI [(match_operand:QI 1 "immediate_operand" "i")] 140))]
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"TARGET_ALTIVEC"
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"vspltish %0, %1"
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[(set_attr "type" "vecsimple")])
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[(set_attr "type" "vecperm")])
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(define_insn "altivec_vspltisw"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:QI 1 "immediate_operand" "i")] 141))]
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"TARGET_ALTIVEC"
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"vspltisw %0, %1"
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[(set_attr "type" "vecsimple")])
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[(set_attr "type" "vecperm")])
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(define_insn ""
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V4SF [(match_operand:QI 1 "immediate_operand" "i")] 142))]
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"TARGET_ALTIVEC"
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"vspltisw %0, %1"
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[(set_attr "type" "vecsimple")])
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[(set_attr "type" "vecperm")])
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(define_insn "ftruncv4sf2"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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@ -1834,7 +1833,7 @@
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(clobber (match_scratch:V16QI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsububm %3,%2,%1\;vmaxsb %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "absv8hi2"
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@ -1844,7 +1843,7 @@
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(clobber (match_scratch:V8HI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsubuhm %3,%2,%1\;vmaxsh %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "absv4si2"
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@ -1854,7 +1853,7 @@
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(clobber (match_scratch:V4SI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsubuwm %3,%2,%1\;vmaxsw %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "absv4sf2"
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@ -1864,7 +1863,7 @@
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(clobber (match_scratch:V4SF 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisw %2, -1\;vslw %3,%2,%2\;vandc %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "altivec_abss_v16qi"
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@ -1874,7 +1873,7 @@
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(clobber (match_scratch:V16QI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsubsbs %3,%2,%1\;vmaxsb %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "altivec_abss_v8hi"
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@ -1884,7 +1883,7 @@
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(clobber (match_scratch:V8HI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsubshs %3,%2,%1\;vmaxsh %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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(define_insn "altivec_abss_v4si"
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@ -1894,5 +1893,5 @@
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(clobber (match_scratch:V4SI 3 "=&v"))]
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"TARGET_ALTIVEC"
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"vspltisb %2,0\;vsubsws %3,%2,%1\;vmaxsw %0,%1,%3"
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[(set_attr "type" "altivec")
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[(set_attr "type" "vecsimple")
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(set_attr "length" "12")])
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@ -40,7 +40,7 @@
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;; Define an insn type attribute. This is used in function unit delay
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;; computations.
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(define_attr "type" "integer,load,store,fpload,fpstore,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,branch,compare,cr_logical,delayed_compare,fpcompare,mtjmpr,fp,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,vecsimple,veccomplex,veccmp,vecperm,vecfloat,altivec"
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(define_attr "type" "integer,load,store,fpload,fpstore,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,branch,compare,cr_logical,delayed_compare,fpcompare,mtjmpr,fp,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,vecsimple,veccomplex,veccmp,vecperm,vecfloat"
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(const_string "integer"))
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;; Length (in bytes).
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