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v850.c (ep_memory_operand): Return FALSE if TARGET_EP is not defined.

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* config/v850/v850.c (ep_memory_operand): Return FALSE if TARGET_EP is not
  defined.
* config/v850/c850.h (TARGET_CPU_CPP_BUILTINS): Define __EP__ if TARGET_EP is
  enabled.
  (OPTIMIZATION_OPTIONS): Do not define MASK_EP when optimizing.
* config/v850/v850.md (save_all_interrupt): Only use the EP register if
  TARGET_EP is defined.
  (restore_all_interrupt): Likewise.
* config/v850/lib1funcs.asm: Update functions so that the EP register is only
  used if __EP__ is defined.

From-SVN: r103520
This commit is contained in:
Nick Clifton 2005-08-26 13:45:42 +00:00 committed by Nick Clifton
parent e296c00c32
commit 2ec6cd51b6
5 changed files with 641 additions and 43 deletions
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13
gcc/ChangeLog
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@ -1,3 +1,16 @@
2005-08-26 Nick Clifton <nickc@redhat.com>
* config/v850/v850.c (ep_memory_operand): Return FALSE if
TARGET_EP is not defined.
* config/v850/c850.h (TARGET_CPU_CPP_BUILTINS): Define __EP__ if
TARGET_EP is enabled.
(OPTIMIZATION_OPTIONS): Do not define MASK_EP when optimizing.
* config/v850/v850.md (save_all_interrupt): Only use the EP
register if TARGET_EP is defined.
(restore_all_interrupt): Likewise.
* config/v850/lib1funcs.asm: Update functions so that the EP
register is only used if __EP__ is defined.
2005-08-26 David Ung <davidu@mips.com>
* config/mips/mips.c (mips_expand_prologue): Handle case when

520
gcc/config/v850/lib1funcs.asm
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File diff suppressed because it is too large Load Diff

9
gcc/config/v850/v850.c
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@ -616,7 +616,7 @@ print_operand (FILE * file, rtx x, int code)
break;
case 'S':
{
/* if it's a reference to a TDA variable, use sst/sld vs. st/ld */
/* If it's a reference to a TDA variable, use sst/sld vs. st/ld. */
if (GET_CODE (x) == MEM && ep_memory_operand (x, GET_MODE (x), FALSE))
fputs ("s", file);
@ -1057,6 +1057,13 @@ ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
int max_offset;
int mask;
/* If we are not using the EP register on a per-function basis
then do not allow this optimisation at all. This is to
prevent the use of the SLD/SST instructions which cannot be
guaranteed to work properly due to a hardware bug. */
if (!TARGET_EP)
return FALSE;
if (GET_CODE (op) != MEM)
return FALSE;

14
gcc/config/v850/v850.h
View File

@ -81,6 +81,8 @@
builtin_define( "__v850" ); \
builtin_assert( "machine=v850" ); \
builtin_assert( "cpu=v850" ); \
if (TARGET_EP) \
builtin_define ("__EP__"); \
} while(0)
#define MASK_CPU (MASK_V850 | MASK_V850E)
@ -131,7 +133,13 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
{ \
target_flags |= MASK_STRICT_ALIGN; \
if (LEVEL) \
target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION); \
/* Note - we no longer enable MASK_EP when optimizing. This is \
because of a hardware bug which stops the SLD and SST instructions\
from correctly detecting some hazards. If the user is sure that \
their hardware is fixed or that their program will not encounter \
the conditions that trigger the bug then they can enable -mep by \
hand. */ \
target_flags |= MASK_PROLOG_FUNCTION; \
}
@ -758,11 +766,11 @@ struct cum_arg { int nbytes; int anonymous_args; };
register class that does not include r0 on the output. */
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' ? ep_memory_operand (OP, GET_MODE (OP), 0) \
((C) == 'Q' ? ep_memory_operand (OP, GET_MODE (OP), FALSE) \
: (C) == 'R' ? special_symbolref_operand (OP, VOIDmode) \
: (C) == 'S' ? (GET_CODE (OP) == SYMBOL_REF \
&& !SYMBOL_REF_ZDA_P (OP)) \
: (C) == 'T' ? ep_memory_operand(OP,GET_MODE(OP),TRUE) \
: (C) == 'T' ? ep_memory_operand (OP, GET_MODE (OP), TRUE) \
: (C) == 'U' ? ((GET_CODE (OP) == SYMBOL_REF \
&& SYMBOL_REF_ZDA_P (OP)) \
|| (GET_CODE (OP) == CONST \

128
gcc/config/v850/v850.md
View File

@ -1832,35 +1832,69 @@
return \"jarl __save_all_interrupt,r10\";
output_asm_insn (\"addi -120, sp, sp\", operands);
output_asm_insn (\"mov ep, r1\", operands);
output_asm_insn (\"mov sp, ep\", operands);
output_asm_insn (\"sst.w r31, 116[ep]\", operands);
output_asm_insn (\"sst.w r2, 112[ep]\", operands);
output_asm_insn (\"sst.w gp, 108[ep]\", operands);
output_asm_insn (\"sst.w r6, 104[ep]\", operands);
output_asm_insn (\"sst.w r7, 100[ep]\", operands);
output_asm_insn (\"sst.w r8, 96[ep]\", operands);
output_asm_insn (\"sst.w r9, 92[ep]\", operands);
output_asm_insn (\"sst.w r11, 88[ep]\", operands);
output_asm_insn (\"sst.w r12, 84[ep]\", operands);
output_asm_insn (\"sst.w r13, 80[ep]\", operands);
output_asm_insn (\"sst.w r14, 76[ep]\", operands);
output_asm_insn (\"sst.w r15, 72[ep]\", operands);
output_asm_insn (\"sst.w r16, 68[ep]\", operands);
output_asm_insn (\"sst.w r17, 64[ep]\", operands);
output_asm_insn (\"sst.w r18, 60[ep]\", operands);
output_asm_insn (\"sst.w r19, 56[ep]\", operands);
output_asm_insn (\"sst.w r20, 52[ep]\", operands);
output_asm_insn (\"sst.w r21, 48[ep]\", operands);
output_asm_insn (\"sst.w r22, 44[ep]\", operands);
output_asm_insn (\"sst.w r23, 40[ep]\", operands);
output_asm_insn (\"sst.w r24, 36[ep]\", operands);
output_asm_insn (\"sst.w r25, 32[ep]\", operands);
output_asm_insn (\"sst.w r26, 28[ep]\", operands);
output_asm_insn (\"sst.w r27, 24[ep]\", operands);
output_asm_insn (\"sst.w r28, 20[ep]\", operands);
output_asm_insn (\"sst.w r29, 16[ep]\", operands);
output_asm_insn (\"mov r1, ep\", operands);
if (TARGET_EP)
{
output_asm_insn (\"mov ep, r1\", operands);
output_asm_insn (\"mov sp, ep\", operands);
output_asm_insn (\"sst.w r31, 116[ep]\", operands);
output_asm_insn (\"sst.w r2, 112[ep]\", operands);
output_asm_insn (\"sst.w gp, 108[ep]\", operands);
output_asm_insn (\"sst.w r6, 104[ep]\", operands);
output_asm_insn (\"sst.w r7, 100[ep]\", operands);
output_asm_insn (\"sst.w r8, 96[ep]\", operands);
output_asm_insn (\"sst.w r9, 92[ep]\", operands);
output_asm_insn (\"sst.w r11, 88[ep]\", operands);
output_asm_insn (\"sst.w r12, 84[ep]\", operands);
output_asm_insn (\"sst.w r13, 80[ep]\", operands);
output_asm_insn (\"sst.w r14, 76[ep]\", operands);
output_asm_insn (\"sst.w r15, 72[ep]\", operands);
output_asm_insn (\"sst.w r16, 68[ep]\", operands);
output_asm_insn (\"sst.w r17, 64[ep]\", operands);
output_asm_insn (\"sst.w r18, 60[ep]\", operands);
output_asm_insn (\"sst.w r19, 56[ep]\", operands);
output_asm_insn (\"sst.w r20, 52[ep]\", operands);
output_asm_insn (\"sst.w r21, 48[ep]\", operands);
output_asm_insn (\"sst.w r22, 44[ep]\", operands);
output_asm_insn (\"sst.w r23, 40[ep]\", operands);
output_asm_insn (\"sst.w r24, 36[ep]\", operands);
output_asm_insn (\"sst.w r25, 32[ep]\", operands);
output_asm_insn (\"sst.w r26, 28[ep]\", operands);
output_asm_insn (\"sst.w r27, 24[ep]\", operands);
output_asm_insn (\"sst.w r28, 20[ep]\", operands);
output_asm_insn (\"sst.w r29, 16[ep]\", operands);
output_asm_insn (\"mov r1, ep\", operands);
}
else
{
output_asm_insn (\"st.w r31, 116[sp]\", operands);
output_asm_insn (\"st.w r2, 112[sp]\", operands);
output_asm_insn (\"st.w gp, 108[sp]\", operands);
output_asm_insn (\"st.w r6, 104[sp]\", operands);
output_asm_insn (\"st.w r7, 100[sp]\", operands);
output_asm_insn (\"st.w r8, 96[sp]\", operands);
output_asm_insn (\"st.w r9, 92[sp]\", operands);
output_asm_insn (\"st.w r11, 88[sp]\", operands);
output_asm_insn (\"st.w r12, 84[sp]\", operands);
output_asm_insn (\"st.w r13, 80[sp]\", operands);
output_asm_insn (\"st.w r14, 76[sp]\", operands);
output_asm_insn (\"st.w r15, 72[sp]\", operands);
output_asm_insn (\"st.w r16, 68[sp]\", operands);
output_asm_insn (\"st.w r17, 64[sp]\", operands);
output_asm_insn (\"st.w r18, 60[sp]\", operands);
output_asm_insn (\"st.w r19, 56[sp]\", operands);
output_asm_insn (\"st.w r20, 52[sp]\", operands);
output_asm_insn (\"st.w r21, 48[sp]\", operands);
output_asm_insn (\"st.w r22, 44[sp]\", operands);
output_asm_insn (\"st.w r23, 40[sp]\", operands);
output_asm_insn (\"st.w r24, 36[sp]\", operands);
output_asm_insn (\"st.w r25, 32[sp]\", operands);
output_asm_insn (\"st.w r26, 28[sp]\", operands);
output_asm_insn (\"st.w r27, 24[sp]\", operands);
output_asm_insn (\"st.w r28, 20[sp]\", operands);
output_asm_insn (\"st.w r29, 16[sp]\", operands);
}
return \"\";
}"
[(set (attr "length")
@ -1897,7 +1931,8 @@
{
if (TARGET_PROLOG_FUNCTION && !TARGET_LONG_CALLS)
return \"jarl __restore_all_interrupt,r10\";
else
if (TARGET_EP)
{
output_asm_insn (\"mov ep, r1\", operands);
output_asm_insn (\"mov sp, ep\", operands);
@ -1928,9 +1963,38 @@
output_asm_insn (\"sld.w 20[ep], r28\", operands);
output_asm_insn (\"sld.w 16[ep], r29\", operands);
output_asm_insn (\"mov r1, ep\", operands);
output_asm_insn (\"addi 120, sp, sp\", operands);
return \"\";
}
else
{
output_asm_insn (\"ld.w 116[sp], r31\", operands);
output_asm_insn (\"ld.w 112[sp], r2\", operands);
output_asm_insn (\"ld.w 108[sp], gp\", operands);
output_asm_insn (\"ld.w 104[sp], r6\", operands);
output_asm_insn (\"ld.w 100[sp], r7\", operands);
output_asm_insn (\"ld.w 96[sp], r8\", operands);
output_asm_insn (\"ld.w 92[sp], r9\", operands);
output_asm_insn (\"ld.w 88[sp], r11\", operands);
output_asm_insn (\"ld.w 84[sp], r12\", operands);
output_asm_insn (\"ld.w 80[sp], r13\", operands);
output_asm_insn (\"ld.w 76[sp], r14\", operands);
output_asm_insn (\"ld.w 72[sp], r15\", operands);
output_asm_insn (\"ld.w 68[sp], r16\", operands);
output_asm_insn (\"ld.w 64[sp], r17\", operands);
output_asm_insn (\"ld.w 60[sp], r18\", operands);
output_asm_insn (\"ld.w 56[sp], r19\", operands);
output_asm_insn (\"ld.w 52[sp], r20\", operands);
output_asm_insn (\"ld.w 48[sp], r21\", operands);
output_asm_insn (\"ld.w 44[sp], r22\", operands);
output_asm_insn (\"ld.w 40[sp], r23\", operands);
output_asm_insn (\"ld.w 36[sp], r24\", operands);
output_asm_insn (\"ld.w 32[sp], r25\", operands);
output_asm_insn (\"ld.w 28[sp], r26\", operands);
output_asm_insn (\"ld.w 24[sp], r27\", operands);
output_asm_insn (\"ld.w 20[sp], r28\", operands);
output_asm_insn (\"ld.w 16[sp], r29\", operands);
}
output_asm_insn (\"addi 120, sp, sp\", operands);
return \"\";
}"
[(set (attr "length")
(if_then_else (ne (symbol_ref "TARGET_LONG_CALLS") (const_int 0))