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ns32k.h: Define named constants for the bits in target_flags and use them.
* config/ns32k/ns32k.h: Define named constants for the bits in target_flags and use them. * config/ns32k/netbsd.h (TARGET_DEFAULT): Use named constants. From-SVN: r54086
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@ -1,3 +1,9 @@
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2002-05-31 Jason Thorpe <thorpej@wasabisystems.com>
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* config/ns32k/ns32k.h: Define named constants for the
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bits in target_flags and use them.
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* config/ns32k/netbsd.h (TARGET_DEFAULT): Use named constants.
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2002-05-30 John David Anglin <dave@hiauly1.hia.nrc.ca>
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* config.gcc (tm_file): Prefix pa/pa-700.h to tm_file list for PA1.0
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@ -24,7 +24,9 @@ Boston, MA 02111-1307, USA. */
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FPU is 32381;
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Use multiply-add instructions */
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#define TARGET_DEFAULT (1 + 24 + 32 + 64 + 256 + 512)
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#define TARGET_DEFAULT \
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(MASK_32532|MASK_32332 | MASK_NO_SB | MASK_NO_BITFIELD | \
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MASK_32081|MASK_32381 | MASK_MULT_ADD)
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/* 32-bit alignment for efficiency */
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@ -61,37 +61,49 @@ Boston, MA 02111-1307, USA. */
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extern int target_flags;
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#define MASK_32081 1
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#define MASK_RTD 2
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#define MASK_REGPARM 4
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#define MASK_32532 8
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#define MASK_32332 16
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#define MASK_NO_SB 32
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#define MASK_NO_BITFIELD 64
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#define MASK_HIMEM 128
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#define MASK_32381 256
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#define MASK_MULT_ADD 512
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#define MASK_SRC 1024
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/* Macros used in the machine description to test the flags. */
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/* Compile 32081 insns for floating point (not library calls). */
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#define TARGET_32081 (target_flags & 1)
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#define TARGET_32381 (target_flags & 256)
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#define TARGET_32081 (target_flags & MASK_32081)
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#define TARGET_32381 (target_flags & MASK_32381)
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/* The use of multiply-add instructions is optional because there may
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* be cases where it produces worse code.
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*/
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#define TARGET_MULT_ADD (target_flags & 512)
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#define TARGET_MULT_ADD (target_flags & MASK_MULT_ADD)
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/* Compile using rtd insn calling sequence.
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This will not work unless you use prototypes at least
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for all functions that can take varying numbers of args. */
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#define TARGET_RTD (target_flags & 2)
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#define TARGET_RTD (target_flags & MASK_RTD)
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/* Compile passing first two args in regs 0 and 1. */
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#define TARGET_REGPARM (target_flags & 4)
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#define TARGET_REGPARM (target_flags & MASK_REGPARM)
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/* Options to select type of CPU, for better optimization.
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The output is correct for any kind of 32000 regardless of these options. */
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#define TARGET_32532 (target_flags & 8)
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#define TARGET_32332 (target_flags & 16)
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#define TARGET_32532 (target_flags & MASK_32532)
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#define TARGET_32332 (target_flags & MASK_32332)
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/* Ok to use the static base register (and presume it's 0) */
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#define TARGET_SB ((target_flags & 32) == 0)
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#define TARGET_HIMEM (target_flags & 128)
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#define TARGET_SB ((target_flags & MASK_NO_SB) == 0)
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#define TARGET_HIMEM (target_flags & MASK_HIMEM)
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/* Compile using bitfield insns. */
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#define TARGET_BITFIELD ((target_flags & 64) == 0)
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#define TARGET_BITFIELD ((target_flags & MASK_NO_BITFIELD) == 0)
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/* Macro to define tables used to set the flags.
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This is a list in braces of pairs in braces,
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@ -100,29 +112,32 @@ extern int target_flags;
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An empty string NAME is used to identify the default VALUE. */
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#define TARGET_SWITCHES \
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{ { "32081", 1, N_("Use hardware fp")}, \
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{ "soft-float", -257, N_("Don't use hardware fp")}, \
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{ "rtd", 2, N_("Alternative calling convention")}, \
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{ "nortd", -2, N_("Use normal calling convention")}, \
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{ "regparm", 4, N_("Pass some arguments in registers")}, \
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{ "noregparm", -4, N_("Pass all arguments on stack")}, \
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{ "32532", 24, N_("Optimize for 32532 cpu")}, \
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{ "32332", 16, N_("Optimize for 32332 cpu")}, \
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{ "32332", -8, 0}, \
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{ "32032", -24, N_("Optimize for 32032")}, \
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{ "sb", -32, \
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{ { "32081", MASK_32081, N_("Use hardware fp")}, \
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{ "soft-float", -(MASK_32081|MASK_32381), \
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N_("Don't use hardware fp")}, \
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{ "rtd", MASK_RTD, N_("Alternative calling convention")}, \
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{ "nortd", -MASK_RTD, N_("Use normal calling convention")}, \
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{ "regparm", MASK_REGPARM, N_("Pass some arguments in registers")}, \
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{ "noregparm", -MASK_REGPARM, N_("Pass all arguments on stack")}, \
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{ "32532", MASK_32532|MASK_32332, N_("Optimize for 32532 cpu")}, \
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{ "32332", MASK_32332, N_("Optimize for 32332 cpu")}, \
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{ "32332", -MASK_32532, 0}, \
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{ "32032", -(MASK_32532|MASK_32332), N_("Optimize for 32032")}, \
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{ "sb", -MASK_NO_SB, \
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N_("Register sb is zero. Use for absolute addressing")}, \
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{ "nosb", 32, N_("Do not use register sb")}, \
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{ "bitfield", -64, N_("Do not use bit-field instructions")}, \
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{ "nobitfield", 64, N_("Use bit-field instructions")}, \
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{ "himem", 128, N_("Generate code for high memory")}, \
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{ "nohimem", -128, N_("Generate code for low memory")}, \
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{ "32381", 256, N_("32381 fpu")}, \
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{ "mult-add", 512, N_("Use multiply-accumulate fp instructions")}, \
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{ "nomult-add", -512, \
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{ "nosb", MASK_NO_SB, N_("Do not use register sb")}, \
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{ "bitfield", -MASK_NO_BITFIELD, \
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N_("Do not use bit-field instructions")}, \
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{ "nobitfield", MASK_NO_BITFIELD, N_("Use bit-field instructions")},\
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{ "himem", MASK_HIMEM, N_("Generate code for high memory")}, \
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{ "nohimem", -MASK_HIMEM, N_("Generate code for low memory")}, \
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{ "32381", MASK_32381, N_("32381 fpu")}, \
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{ "mult-add", MASK_MULT_ADD, \
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N_("Use multiply-accumulate fp instructions")}, \
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{ "nomult-add", -MASK_MULT_ADD, \
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N_("Do not use multiply-accumulate fp instructions") }, \
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{ "src", 1024, N_("\"Small register classes\" kludge")}, \
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{ "nosrc", -1024, N_("No \"Small register classes\" kludge")}, \
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{ "src", MASK_SRC, N_("\"Small register classes\" kludge")}, \
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{ "nosrc", -MASK_SRC, N_("No \"Small register classes\" kludge")}, \
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{ "", TARGET_DEFAULT, 0}}
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/* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
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@ -132,9 +147,12 @@ extern int target_flags;
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#define OVERRIDE_OPTIONS \
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{ \
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if (flag_pic || TARGET_HIMEM) target_flags |= 32; \
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if (TARGET_32381) target_flags |= 1; \
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else target_flags &= ~512; \
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if (flag_pic || TARGET_HIMEM) \
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target_flags |= MASK_NO_SB; \
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if (TARGET_32381) \
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target_flags |= MASK_32081; \
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else \
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target_flags &= ~MASK_MULT_ADD; \
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}
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/* Zero or more C statements that may conditionally modify two
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@ -835,7 +853,7 @@ __transfer_from_trampoline () \
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/* SMALL_REGISTER_CLASSES is a run time option. This should no longer
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be necessay and should go when we have confidence that we won't run
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out of spill registers */
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#define SMALL_REGISTER_CLASSES (target_flags & 1024)
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#define SMALL_REGISTER_CLASSES (target_flags & MASK_SRC)
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/* A C expression whose value is nonzero if pseudos that have been
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assigned to registers of class CLASS would likely be spilled
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