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runtime: use a fence instruction before rdtsc
This implements the same choices made in the gc runtime, except that for 32-bit x86 we only use the fence instruction if the processor supports SSE2. The code here is hacked up for speed; the gc runtime uses straight assembler. Reviewed-on: https://go-review.googlesource.com/97715 From-SVN: r258336
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@ -1,4 +1,4 @@
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3287064c24cbf0c50776cdb87a720d29130b4363
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2a07cd31927ac943104f55d2b696e53e7cd073b3
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The first line of this file holds the git revision number of the last
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merge done from the gofrontend repository.
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@ -33,13 +33,47 @@ runtime_atoi(const byte *p, intgo len)
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return n;
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}
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#if defined(__i386__) || defined(__x86_64__) || defined (__s390__) || defined (__s390x__)
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// When cputicks is just asm instructions, skip the split stack
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// prologue for speed.
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int64 runtime_cputicks(void) __attribute__((no_split_stack));
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#endif
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// Whether the processor supports SSE2.
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#if defined (__i386__)
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static _Bool hasSSE2;
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// Force appropriate CPU level so that we can call the lfence/mfence
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// builtins.
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#pragma GCC push_options
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#pragma GCC target("sse2")
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#elif defined(__x86_64__)
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#define hasSSE2 true
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#endif
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#if defined(__i386__) || defined(__x86_64__)
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// Whether to use lfence, as opposed to mfence.
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// Set based on cpuid.
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static _Bool lfenceBeforeRdtsc;
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#endif // defined(__i386__) || defined(__x86_64__)
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int64
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runtime_cputicks(void)
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{
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#if defined(__386__) || defined(__x86_64__)
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uint32 low, high;
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asm("rdtsc" : "=a" (low), "=d" (high));
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return (int64)(((uint64)high << 32) | (uint64)low);
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#if defined(__i386__) || defined(__x86_64__)
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if (hasSSE2) {
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if (lfenceBeforeRdtsc) {
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__builtin_ia32_lfence();
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} else {
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__builtin_ia32_mfence();
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}
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}
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return __builtin_ia32_rdtsc();
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#elif defined (__s390__) || defined (__s390x__)
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uint64 clock = 0;
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/* stckf may not write the return variable in case of a clock error, so make
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@ -56,6 +90,10 @@ runtime_cputicks(void)
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#endif
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}
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#if defined(__i386__)
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#pragma GCC pop_options
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#endif
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void
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runtime_signalstack(byte *p, uintptr n)
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{
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@ -146,8 +184,21 @@ runtime_cpuinit()
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#if defined(__i386__) || defined(__x86_64__)
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unsigned int eax, ebx, ecx, edx;
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if (__get_cpuid(0, &eax, &ebx, &ecx, &edx)) {
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if (eax != 0
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&& ebx == 0x756E6547 // "Genu"
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&& edx == 0x49656E69 // "ineI"
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&& ecx == 0x6C65746E) { // "ntel"
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lfenceBeforeRdtsc = true;
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}
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}
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if (__get_cpuid(1, &eax, &ebx, &ecx, &edx)) {
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setCpuidECX(ecx);
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#if defined(__i386__)
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if ((edx & bit_SSE2) != 0) {
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hasSSE2 = true;
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}
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#endif
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}
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#if defined(HAVE_AS_X86_AES)
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