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re PR target/65368 (_bzhi_u32 intrinsic generates incorrect code when -O1 or above is specified and index is an immediate)
PR target/65368 * config/i386/i386.md (bmi2_bzhi_<mode>3): Removed define_insn, new define_expand. (*bmi2_bzhi_<mode>3, *bmi2_bzhi_<mode>3_1): New define_insns. * gcc.target/i386/bmi2-bzhi-2.c: New test. From-SVN: r221335
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
48188959fd
commit
2d977ff983
@ -1,3 +1,10 @@
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2015-03-10 Jakub Jelinek <jakub@redhat.com>
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PR target/65368
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* config/i386/i386.md (bmi2_bzhi_<mode>3): Removed define_insn,
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new define_expand.
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(*bmi2_bzhi_<mode>3, *bmi2_bzhi_<mode>3_1): New define_insns.
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2015-03-10 Jan Hubicka <hubicka@ucw.cz>
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* ipa-icf.c (sem_function::equals_wpa): Move here some checks
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@ -12678,18 +12678,52 @@
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(set_attr "mode" "<MODE>")])
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;; BMI2 instructions.
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(define_insn "bmi2_bzhi_<mode>3"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(and:SWI48 (lshiftrt:SWI48 (const_int -1)
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(match_operand:SWI48 2 "register_operand" "r"))
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")))
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(clobber (reg:CC FLAGS_REG))]
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(define_expand "bmi2_bzhi_<mode>3"
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[(parallel
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[(set (match_operand:SWI48 0 "register_operand")
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(zero_extract:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand")
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(umin:SWI48
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(and:SWI48 (match_operand:SWI48 2 "register_operand")
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(const_int 255))
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(match_dup 3))
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(const_int 0)))
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(clobber (reg:CC FLAGS_REG))])]
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"TARGET_BMI2"
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"operands[3] = GEN_INT (<MODE_SIZE> * BITS_PER_UNIT);")
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(define_insn "*bmi2_bzhi_<mode>3"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(zero_extract:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")
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(umin:SWI48
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(and:SWI48 (match_operand:SWI48 2 "register_operand" "r")
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(const_int 255))
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(match_operand:SWI48 3 "const_int_operand" "n"))
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(const_int 0)))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
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"bzhi\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "bitmanip")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<MODE>")])
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(define_mode_attr k [(SI "k") (DI "q")])
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(define_insn "*bmi2_bzhi_<mode>3_1"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(zero_extract:SWI48
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(match_operand:SWI48 1 "nonimmediate_operand" "rm")
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(umin:SWI48
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(zero_extend:SWI48 (match_operand:QI 2 "register_operand" "r"))
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(match_operand:SWI48 3 "const_int_operand" "n"))
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(const_int 0)))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
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"bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
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[(set_attr "type" "bitmanip")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<MODE>")])
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(define_insn "bmi2_pdep_<mode>3"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
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@ -1,3 +1,8 @@
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2015-03-10 Jakub Jelinek <jakub@redhat.com>
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PR target/65368
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* gcc.target/i386/bmi2-bzhi-2.c: New test.
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2015-03-10 Paul Thomas <pault@gcc.gnu.org>
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PR fortran/65024
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67
gcc/testsuite/gcc.target/i386/bmi2-bzhi-2.c
Normal file
67
gcc/testsuite/gcc.target/i386/bmi2-bzhi-2.c
Normal file
@ -0,0 +1,67 @@
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/* PR target/65368 */
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/* { dg-do assemble { target bmi2 } } */
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/* { dg-options "-O2 -mbmi2" } */
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#include <x86intrin.h>
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#include "bmi2-check.h"
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unsigned int a;
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unsigned long long b;
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#define A __attribute__((noinline, noclone))
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A unsigned int f1 (void) { return _bzhi_u32 (a, 0); }
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A unsigned int f2 (unsigned int x) { return _bzhi_u32 (x, 0); }
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A unsigned int f3 (void) { return _bzhi_u32 (a, 5); }
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A unsigned int f4 (unsigned int x) { return _bzhi_u32 (x, 5); }
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A unsigned int f5 (void) { return _bzhi_u32 (a, 31); }
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A unsigned int f6 (unsigned int x) { return _bzhi_u32 (x, 31); }
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A unsigned int f7 (void) { return _bzhi_u32 (a, 32); }
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A unsigned int f8 (unsigned int x) { return _bzhi_u32 (x, 32); }
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A unsigned int f9 (void) { return _bzhi_u32 (a, 37); }
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A unsigned int f10 (unsigned int x) { return _bzhi_u32 (x, 37); }
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A unsigned int f11 (void) { return _bzhi_u32 (a, 257); }
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A unsigned int f12 (unsigned int x) { return _bzhi_u32 (x, 257); }
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A unsigned int f13 (void) { return _bzhi_u32 (a, 289); }
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A unsigned int f14 (unsigned int x) { return _bzhi_u32 (x, 289); }
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#ifdef __x86_64__
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A unsigned long long f21 (void) { return _bzhi_u64 (b, 0); }
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A unsigned long long f22 (unsigned long long x) { return _bzhi_u64 (x, 0); }
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A unsigned long long f23 (void) { return _bzhi_u64 (b, 5); }
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A unsigned long long f24 (unsigned long long x) { return _bzhi_u64 (x, 5); }
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A unsigned long long f25 (void) { return _bzhi_u64 (b, 63); }
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A unsigned long long f26 (unsigned long long x) { return _bzhi_u64 (x, 63); }
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A unsigned long long f27 (void) { return _bzhi_u64 (b, 64); }
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A unsigned long long f28 (unsigned long long x) { return _bzhi_u64 (x, 64); }
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A unsigned long long f29 (void) { return _bzhi_u64 (b, 69); }
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A unsigned long long f30 (unsigned long long x) { return _bzhi_u64 (x, 69); }
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A unsigned long long f31 (void) { return _bzhi_u64 (b, 257); }
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A unsigned long long f32 (unsigned long long x) { return _bzhi_u64 (x, 257); }
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A unsigned long long f33 (void) { return _bzhi_u64 (b, 321); }
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A unsigned long long f34 (unsigned long long x) { return _bzhi_u64 (x, 321); }
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#endif
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static void
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bmi2_test ()
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{
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a = -1U;
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b = -1ULL;
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if (f1 () != 0 || f2 (-1U) != 0
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|| f3 () != 0x1f || f4 (-1U) != 0x1f
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|| f5 () != 0x7fffffffU || f6 (-1U) != 0x7fffffffU
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|| f7 () != -1U || f8 (-1U) != -1U
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|| f9 () != -1U || f10 (-1U) != -1U
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|| f11 () != 1 || f12 (-1U) != 1
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|| f13 () != -1U || f14 (-1U) != -1U)
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abort ();
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#ifdef __x86_64__
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if (f21 () != 0 || f22 (-1ULL) != 0
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|| f23 () != 0x1f || f24 (-1ULL) != 0x1f
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|| f25 () != 0x7fffffffffffffffULL || f26 (-1ULL) != 0x7fffffffffffffffULL
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|| f27 () != -1ULL || f28 (-1ULL) != -1ULL
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|| f29 () != -1ULL || f30 (-1ULL) != -1ULL
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|| f31 () != 1 || f32 (-1ULL) != 1
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|| f33 () != -1ULL || f34 (-1ULL) != -1ULL)
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abort ();
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#endif
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}
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