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(movqi): Enable use of clr and st insns on TARGET_5200.

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From-SVN: r13576
This commit is contained in:
Richard Kenner 1997-02-01 19:11:01 -05:00
parent 0cb7cfedce
commit 2c5447d988
1 changed files with 5 additions and 4 deletions
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9
gcc/config/m68k/m68k.md
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@ -993,12 +993,13 @@
/* clr and st insns on 68000 read before writing. /* clr and st insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */ This isn't so on the 68010, but we have no TARGET_68010. */
if (!ADDRESS_REG_P (operands[0]) if (!ADDRESS_REG_P (operands[0])
&& (TARGET_68020 && ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))) || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
{ {
if (operands[1] == const0_rtx) if (operands[1] == const0_rtx)
return \"clr%.b %0\"; return \"clr%.b %0\";
if (GET_CODE (operands[1]) == CONST_INT if ((!TARGET_5200 || DATA_REG_P (operands[0]))
&& GET_CODE (operands[1]) == CONST_INT
&& (INTVAL (operands[1]) & 255) == 255) && (INTVAL (operands[1]) & 255) == 255)
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
@ -4356,13 +4357,13 @@
"!TARGET_5200" "!TARGET_5200"
"lsl%.b %1,%0") "lsl%.b %1,%0")
;; On all 68k models, this makes faster code in a special case. ;; On most 68k models, this makes faster code in a special case.
(define_insn "ashrsi_16" (define_insn "ashrsi_16"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
(const_int 16)))] (const_int 16)))]
"" "!TARGET_68060"
"swap %0\;ext%.l %0") "swap %0\;ext%.l %0")
;; On the 68000, this makes faster code in a special case. ;; On the 68000, this makes faster code in a special case.