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avr.c: Fix comment formatting.
* config/avr/avr.c: Fix comment formatting. * config/avr/avr.md: Likewise. From-SVN: r75011
This commit is contained in:
Kazu Hirata
Kazu Hirata
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baac771ac4
commit
2c338472ba
@ -1,3 +1,8 @@
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2003-12-24 Kazu Hirata <kazu@cs.umass.edu>
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* config/avr/avr.c: Fix comment formatting.
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* config/avr/avr.md: Likewise.
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2003-12-24 Kazu Hirata <kazu@cs.umass.edu>
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PR target/12721.
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@ -78,7 +78,7 @@ static int default_rtx_costs (rtx, enum rtx_code, enum rtx_code);
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static bool avr_rtx_costs (rtx, int, int, int *);
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static int avr_address_cost (rtx);
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/* Allocate registers from r25 to r8 for parameters for function calls */
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/* Allocate registers from r25 to r8 for parameters for function calls. */
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#define FIRST_CUM_REG 26
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/* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
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@ -276,7 +276,7 @@ avr_override_options (void)
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zero_reg_rtx = gen_rtx_REG (QImode, ZERO_REGNO);
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}
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/* return register class from register number */
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/* return register class from register number. */
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static const int reg_class_tab[]={
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GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
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@ -292,7 +292,7 @@ static const int reg_class_tab[]={
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STACK_REG,STACK_REG /* SPL,SPH */
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};
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/* Return register class for register R */
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/* Return register class for register R. */
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enum reg_class
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avr_regno_reg_class (int r)
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@ -415,7 +415,7 @@ avr_regs_to_save (HARD_REG_SET *set)
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return count;
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}
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/* Compute offset between arg_pointer and frame_pointer */
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/* Compute offset between arg_pointer and frame_pointer. */
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int
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initial_elimination_offset (int from, int to)
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@ -446,7 +446,7 @@ avr_simple_epilogue (void)
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&& ! TREE_THIS_VOLATILE (current_function_decl));
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}
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/* This function checks sequence of live registers */
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/* This function checks sequence of live registers. */
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static int
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sequent_regs_live (void)
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@ -603,7 +603,7 @@ out_set_stack_ptr (FILE *file, int before, int after)
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}
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/* Output function prologue */
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/* Output function prologue. */
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static void
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avr_output_function_prologue (FILE *file, HOST_WIDE_INT size)
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@ -733,7 +733,7 @@ avr_output_function_prologue (FILE *file, HOST_WIDE_INT size)
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fprintf (file, "/* prologue end (size=%d) */\n", prologue_size);
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}
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/* Output function epilogue */
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/* Output function epilogue. */
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static void
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avr_output_function_epilogue (FILE *file, HOST_WIDE_INT size)
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@ -980,7 +980,7 @@ legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
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}
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/* Return a pointer register name as a string */
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/* Return a pointer register name as a string. */
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static const char *
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ptrreg_to_str (int regno)
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@ -1027,7 +1027,7 @@ cond_string (enum rtx_code code)
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}
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}
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/* Output ADDR to FILE as address */
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/* Output ADDR to FILE as address. */
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void
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print_operand_address (FILE *file, rtx addr)
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@ -1061,7 +1061,7 @@ print_operand_address (FILE *file, rtx addr)
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}
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/* Output X as assembler operand to file FILE */
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/* Output X as assembler operand to file FILE. */
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void
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print_operand (FILE *file, rtx x, int code)
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@ -1132,7 +1132,7 @@ print_operand (FILE *file, rtx x, int code)
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print_operand_address (file, x);
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}
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/* Recognize operand OP of mode MODE used in call instructions */
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/* Recognize operand OP of mode MODE used in call instructions. */
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int
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call_insn_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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@ -1454,7 +1454,7 @@ avr_num_arg_regs (enum machine_mode mode, tree type)
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}
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/* Controls whether a function argument is passed
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in a register, and which register. */
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in a register, and which register. */
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rtx
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function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
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@ -2592,7 +2592,7 @@ out_movhi_mr_r (rtx insn, rtx op[], int *l)
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return "";
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}
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/* Return 1 if frame pointer for current function required */
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/* Return 1 if frame pointer for current function required. */
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int
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frame_pointer_required_p (void)
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@ -2648,7 +2648,7 @@ compare_eq_p (rtx insn)
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}
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/* Output test instruction for HImode */
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/* Output test instruction for HImode. */
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const char *
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out_tsthi (rtx insn, int *l)
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@ -2661,7 +2661,7 @@ out_tsthi (rtx insn, int *l)
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if (reg_unused_after (insn, SET_SRC (PATTERN (insn)))
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&& compare_eq_p (insn))
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{
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/* faster than sbiw if we can clobber the operand */
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/* Faster than sbiw if we can clobber the operand. */
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if (l) *l = 1;
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return AS2 (or,%A0,%B0);
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}
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@ -2676,7 +2676,7 @@ out_tsthi (rtx insn, int *l)
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}
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/* Output test instruction for SImode */
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/* Output test instruction for SImode. */
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const char *
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out_tstsi (rtx insn, int *l)
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@ -4215,7 +4215,7 @@ adjust_insn_length (rtx insn, int len)
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return len;
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}
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/* Return nonzero if register REG dead after INSN */
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/* Return nonzero if register REG dead after INSN. */
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int
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reg_unused_after (rtx insn, rtx reg)
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@ -4346,7 +4346,7 @@ avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
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return default_assemble_integer (x, size, aligned_p);
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}
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/* Sets section name for declaration DECL */
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/* Sets section name for declaration DECL. */
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static void
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avr_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
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@ -4838,7 +4838,7 @@ avr_rtx_costs (rtx x, int code, int outer_code, int *total)
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}
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}
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/* Calculate the cost of a memory address */
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/* Calculate the cost of a memory address. */
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static int
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avr_address_cost (rtx x)
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@ -4903,7 +4903,7 @@ extra_constraint (rtx x, int c)
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return 0;
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}
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/* Convert condition code CONDITION to the valid AVR condition code */
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/* Convert condition code CONDITION to the valid AVR condition code. */
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RTX_CODE
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avr_normalize_condition (RTX_CODE condition)
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@ -4948,7 +4948,7 @@ avr_reorg (void)
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{
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if (GET_CODE (SET_SRC (pattern)) == COMPARE)
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{
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/* Now we work under compare insn */
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/* Now we work under compare insn. */
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pattern = SET_SRC (pattern);
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if (true_regnum (XEXP (pattern,0)) >= 0
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@ -178,7 +178,7 @@
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[(set (match_operand:QI 0 "nonimmediate_operand" "")
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(match_operand:QI 1 "general_operand" ""))]
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""
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"/* One of the ops has to be in a register */
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"/* One of the ops has to be in a register. */
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if (!register_operand(operand0, QImode)
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&& ! (register_operand(operand1, QImode) || const0_rtx == operand1))
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operands[1] = copy_to_mode_reg(QImode, operand1);
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@ -226,7 +226,7 @@
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""
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"
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{
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/* One of the ops has to be in a register */
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/* One of the ops has to be in a register. */
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if (!register_operand(operand0, HImode)
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&& !(register_operand(operand1, HImode) || const0_rtx == operands[1]))
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{
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