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m68k.c (m68k_last_compare_had_fp_operands): New variable.
* m68k/m68k.c (m68k_last_compare_had_fp_operands): New variable.
* m68k/m68k.h (m68k_last_compare_had_fp_operands): Declare it.
* m68k/m68k.md (tst*, cmp*): Turn all of these into
define_expand/define_insn pairs. Keep track of whether or not
the test/compare has fp operands.
(seq, sne, sgt, slt, sge, sle): Turn these into
define_expand/define_insn pairs. Make the expanders FAIL if
TARGET_68060 and the last comparison/test had fp operands.
From-SVN: r13731
This commit is contained in:
Jeff Law
parent
f57b1ad380
commit
2b3600acb4
@ -68,6 +68,10 @@ int m68k_align_jumps;
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/* Specify power of two alignment used for functions. */
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int m68k_align_funcs;
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/* Nonzero if the last compare/test insn had FP operands. The
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sCC expanders peek at this to determine what to do for the
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68060, which has no fsCC instructions. */
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int m68k_last_compare_had_fp_operands;
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/* Sometimes certain combinations of command options do not make
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sense on a particular target machine. You can define a macro
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@ -2094,6 +2094,7 @@ extern char *m68k_align_funcs_string;
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extern int m68k_align_loops;
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extern int m68k_align_jumps;
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extern int m68k_align_funcs;
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extern int m68k_last_compare_had_fp_operands;
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/*
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@ -303,7 +303,15 @@
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;; (set (cc0) (const_int foo)) has no mode information. Such insns will
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;; be folded while optimizing anyway.
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(define_insn "tstdi"
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(define_expand "tstdi"
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[(set (cc0)
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(match_operand:DI 0 "nonimmediate_operand" ""))
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(clobber (match_scratch:SI 1 ""))
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(clobber (match_scratch:DI 2 ""))]
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""
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(match_operand:DI 0 "nonimmediate_operand" "am,d"))
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(clobber (match_scratch:SI 1 "=X,d"))
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@ -335,7 +343,13 @@
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return \"sub%.l %1,%1\;tst%.l %R0\;subx%.l %1,%0\";
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}")
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(define_insn "tstsi"
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(define_expand "tstsi"
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[(set (cc0)
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(match_operand:SI 0 "nonimmediate_operand" ""))]
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""
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(match_operand:SI 0 "nonimmediate_operand" "rm"))]
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""
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@ -360,13 +374,25 @@
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;; This can't use an address register, because comparisons
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;; with address registers as second operand always test the whole word.
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(define_insn "tsthi"
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(define_expand "tsthi"
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[(set (cc0)
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(match_operand:HI 0 "nonimmediate_operand" ""))]
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""
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(match_operand:HI 0 "nonimmediate_operand" "dm"))]
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""
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"tst%.w %0")
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(define_insn "tstqi"
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(define_expand "tstqi"
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[(set (cc0)
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(match_operand:QI 0 "nonimmediate_operand" ""))]
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""
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(match_operand:QI 0 "nonimmediate_operand" "dm"))]
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""
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@ -378,6 +404,7 @@
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"TARGET_68881 || TARGET_FPA"
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"
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{
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m68k_last_compare_had_fp_operands = 1;
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if (TARGET_FPA)
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{
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emit_insn (gen_tstsf_fpa (operands[0]));
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@ -410,6 +437,7 @@
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"TARGET_68881 || TARGET_FPA"
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"
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{
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m68k_last_compare_had_fp_operands = 1;
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if (TARGET_FPA)
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{
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emit_insn (gen_tstsf_fpa (operands[0]));
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@ -445,7 +473,7 @@
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(match_operand:DI 1 "general_operand" "")))
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(clobber (match_dup 2))])]
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""
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"operands[2] = gen_reg_rtx (DImode);")
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"m68k_last_compare_had_fp_operands = 0; operands[2] = gen_reg_rtx (DImode);")
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(define_insn ""
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[(set (cc0)
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@ -473,6 +501,7 @@
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""
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"
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{
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m68k_last_compare_had_fp_operands = 0;
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if (flag_pic && symbolic_operand (operands[1], SImode))
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{
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/* The source is an address which requires PIC relocation.
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@ -538,7 +567,14 @@
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#endif
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}")
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(define_insn "cmphi"
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(define_expand "cmphi"
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[(set (cc0)
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(compare (match_operand:HI 0 "nonimmediate_operand" "")
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(match_operand:HI 1 "general_operand" "")))]
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"!TARGET_5200"
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(compare (match_operand:HI 0 "nonimmediate_operand" "rnm,d,n,m,>")
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(match_operand:HI 1 "general_operand" "d,rnm,m,n,>")))]
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@ -567,7 +603,14 @@
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#endif
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}")
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(define_insn "cmpqi"
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(define_expand "cmpqi"
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[(set (cc0)
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(compare (match_operand:QI 0 "nonimmediate_operand" "")
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(match_operand:QI 1 "general_operand" "")))]
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"!TARGET_5200"
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"m68k_last_compare_had_fp_operands = 0;")
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(define_insn ""
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[(set (cc0)
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(compare (match_operand:QI 0 "nonimmediate_operand" "dn,md,>")
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(match_operand:QI 1 "general_operand" "dm,nd,>")))]
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@ -603,6 +646,7 @@
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"TARGET_68881 || TARGET_FPA"
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"
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{
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m68k_last_compare_had_fp_operands = 1;
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if (TARGET_FPA)
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{
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emit_insn (gen_cmpdf_fpa (operands[0], operands[1]));
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@ -656,6 +700,7 @@
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"TARGET_68881 || TARGET_FPA"
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"
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{
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m68k_last_compare_had_fp_operands = 1;
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if (TARGET_FPA)
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{
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emit_insn (gen_cmpsf_fpa (operands[0], operands[1]));
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@ -5332,7 +5377,20 @@
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return output_scc_di (operands[1], operands[2], operands[3], operands[0]);
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} ")
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(define_insn "seq"
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(define_expand "seq"
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[(set (match_operand:QI 0 "general_operand" "")
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(eq:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(eq:QI (cc0) (const_int 0)))]
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""
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@ -5341,7 +5399,20 @@
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OUTPUT_JUMP (\"seq %0\", \"fseq %0\", \"seq %0\");
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")
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(define_insn "sne"
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(define_expand "sne"
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[(set (match_operand:QI 0 "general_operand" "")
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(ne:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(ne:QI (cc0) (const_int 0)))]
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""
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@ -5350,7 +5421,20 @@
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OUTPUT_JUMP (\"sne %0\", \"fsne %0\", \"sne %0\");
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")
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(define_insn "sgt"
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(define_expand "sgt"
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[(set (match_operand:QI 0 "general_operand" "")
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(gt:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(gt:QI (cc0) (const_int 0)))]
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""
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@ -5366,7 +5450,20 @@
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"* cc_status = cc_prev_status;
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return \"shi %0\"; ")
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(define_insn "slt"
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(define_expand "slt"
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[(set (match_operand:QI 0 "general_operand" "")
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(lt:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(lt:QI (cc0) (const_int 0)))]
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""
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@ -5380,7 +5477,20 @@
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"* cc_status = cc_prev_status;
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return \"scs %0\"; ")
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(define_insn "sge"
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(define_expand "sge"
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[(set (match_operand:QI 0 "general_operand" "")
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(ge:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(ge:QI (cc0) (const_int 0)))]
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""
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@ -5394,7 +5504,20 @@
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"* cc_status = cc_prev_status;
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return \"scc %0\"; ")
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(define_insn "sle"
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(define_expand "sle"
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[(set (match_operand:QI 0 "general_operand" "")
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(le:QI (cc0) (const_int 0)))]
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""
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"
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{
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if (TARGET_68060 && m68k_last_compare_had_fp_operands)
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{
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m68k_last_compare_had_fp_operands = 0;
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FAIL;
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}
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}")
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "=dm")
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(le:QI (cc0) (const_int 0)))]
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""
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@ -6844,7 +6967,13 @@
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fpsm%.s %x3,%2,%x1,%0
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fpsm%.s %x3,%2,%x1,%0")
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(define_insn "tstxf"
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(define_expand "tstxf"
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[(set (cc0)
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(match_operand:XF 0 "nonimmediate_operand" ""))]
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"TARGET_68881"
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"m68k_last_compare_had_fp_operands = 1;")
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(define_insn ""
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[(set (cc0)
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(match_operand:XF 0 "nonimmediate_operand" "fm"))]
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"TARGET_68881"
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@ -6854,7 +6983,14 @@
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return \"ftst%.x %0\";
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}")
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(define_insn "cmpxf"
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(define_expand "cmpxf"
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[(set (cc0)
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(compare (match_operand:XF 0 "nonimmediate_operand" "")
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(match_operand:XF 1 "nonimmediate_operand" "")))]
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"TARGET_68881"
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"m68k_last_compare_had_fp_operands = 1;")
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(define_insn ""
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[(set (cc0)
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(compare (match_operand:XF 0 "nonimmediate_operand" "f,m")
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(match_operand:XF 1 "nonimmediate_operand" "fm,f")))]
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