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v850.md (maddsf4): Rename to fmasf4 and use fma rtx_code.
* config/v850/v850.md (maddsf4): Rename to fmasf4 and use fma rtx_code. (msubsf4): Rename to fmssf4, and use fma. (nmaddsf4): Rename to fnmasf4 and use fma. (nmsubsf4): Rename to fnmssf4 and use fma. From-SVN: r166808
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@ -1,3 +1,11 @@
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2010-11-16 Nick Clifton <nickc@redhat.com>
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* config/v850/v850.md (maddsf4): Rename to fmasf4 and use fma
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rtx_code.
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(msubsf4): Rename to fmssf4, and use fma.
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(nmaddsf4): Rename to fnmasf4 and use fma.
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(nmsubsf4): Rename to fnmssf4 and use fma.
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2010-11-16 Joern Rennecke <amylaar@spamcop.net>
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PR target/44762
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@ -2024,24 +2024,23 @@
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(set_attr "type" "fpu")])
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;;; multiply-add
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(define_insn "maddsf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r"))
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(match_operand:SF 3 "register_operand" "r")))]
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(define_insn "fmasf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(fma:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r")
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(match_operand:SF 3 "register_operand" "r")))]
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"TARGET_V850E2V3"
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"maddf.s %2,%1,%3,%0"
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[(set_attr "length" "4")
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(set_attr "cc" "none_0hit")
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(set_attr "type" "fpu")])
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;;; multiply-subtract
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(define_insn "msubsf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r"))
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(match_operand:SF 3 "register_operand" "r")))]
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(define_insn "fmssf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(fma:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r")
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(neg:SF (match_operand:SF 3 "register_operand" "r"))))]
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"TARGET_V850E2V3"
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"msubf.s %2,%1,%3,%0"
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[(set_attr "length" "4")
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@ -2049,11 +2048,11 @@
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(set_attr "type" "fpu")])
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;;; negative-multiply-add
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(define_insn "nmaddsf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(neg:SF (plus:SF (mult:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r"))
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(match_operand:SF 3 "register_operand" "r"))))]
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(define_insn "fnmasf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "r"))
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(match_operand:SF 2 "register_operand" "r")
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(match_operand:SF 3 "register_operand" "r")))]
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"TARGET_V850E2V3"
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"nmaddf.s %2,%1,%3,%0"
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[(set_attr "length" "4")
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@ -2061,11 +2060,11 @@
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(set_attr "type" "fpu")])
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;; negative-multiply-subtract
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(define_insn "nmsubsf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(neg:SF (minus:SF (mult:SF (match_operand:SF 1 "register_operand" "r")
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(match_operand:SF 2 "register_operand" "r"))
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(match_operand:SF 3 "register_operand" "r"))))]
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(define_insn "fnmssf4"
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[(set (match_operand:SF 0 "register_operand" "=r")
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(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "r"))
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(match_operand:SF 2 "register_operand" "r")
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(neg:SF (match_operand:SF 3 "register_operand" "r"))))]
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"TARGET_V850E2V3"
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"nmsubf.s %2,%1,%3,%0"
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[(set_attr "length" "4")
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