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rs6000.h (USE_FP_FOR_ARG_P): Move to rs6000.c.
* config/rs6000/rs6000.h (USE_FP_FOR_ARG_P): Move to rs6000.c. (USE_ALTIVEC_FOR_ARG_P): Likewise. * config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Move from rs6000.h. Take a pointer as the CUM parameter. Update callers. (USE_ALTIVEC_FOR_ARG_P): Likewise. Also correct for Darwin/AIX 32-bit ABIs. (function_arg_advance): Use USE_ALTIVEC_FOR_ARG_P. Correct case of vector parameters as named arguments of stdarg function. (function_arg): Likewise. * config/rs6000/darwin.h (ASM_SPEC): Use -force_cpusubtype_ALL when -maltivec is specified, not the non-existent -faltivec. From-SVN: r73317
This commit is contained in:
Geoffrey Keating
Geoffrey Keating
parent
8c17530ef3
commit
2858f73ac1
@ -1,3 +1,18 @@
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2003-11-06 Geoffrey Keating <geoffk@apple.com>
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* config/rs6000/rs6000.h (USE_FP_FOR_ARG_P): Move to rs6000.c.
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(USE_ALTIVEC_FOR_ARG_P): Likewise.
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* config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Move from rs6000.h.
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Take a pointer as the CUM parameter. Update callers.
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(USE_ALTIVEC_FOR_ARG_P): Likewise. Also correct for Darwin/AIX
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32-bit ABIs.
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(function_arg_advance): Use USE_ALTIVEC_FOR_ARG_P. Correct case
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of vector parameters as named arguments of stdarg function.
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(function_arg): Likewise.
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* config/rs6000/darwin.h (ASM_SPEC): Use -force_cpusubtype_ALL when
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-maltivec is specified, not the non-existent -faltivec.
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2003-11-06 Ulrich Weigand <uweigand@de.ibm.com>
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* config/s390/s390-protos.h (s390_function_value): Declare.
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@ -100,7 +100,7 @@ do { \
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#define ASM_SPEC "-arch ppc \
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%{Zforce_cpusubtype_ALL:-force_cpusubtype_ALL} \
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%{!Zforce_cpusubtype_ALL:%{faltivec:-force_cpusubtype_ALL}}"
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%{!Zforce_cpusubtype_ALL:%{maltivec:-force_cpusubtype_ALL}}"
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#undef SUBTARGET_EXTRA_SPECS
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#define SUBTARGET_EXTRA_SPECS \
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@ -3618,6 +3618,19 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
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}
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/* Nonzero if we can use a floating-point register to pass this arg. */
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#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
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(GET_MODE_CLASS (MODE) == MODE_FLOAT \
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&& (CUM)->fregno <= FP_ARG_MAX_REG \
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&& TARGET_HARD_FLOAT && TARGET_FPRS)
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/* Nonzero if we can use an AltiVec register to pass this arg. */
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#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \
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(ALTIVEC_VECTOR_MODE (MODE) \
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&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \
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&& TARGET_ALTIVEC_ABI \
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&& (DEFAULT_ABI == ABI_V4 || (NAMED)))
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/* Return a nonzero value to say to return the function value in
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memory, just as large structures are always returned. TYPE will be
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the data type of the value, and FNTYPE will be the type of the
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@ -3802,23 +3815,35 @@ function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
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{
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if (named && cum->vregno <= ALTIVEC_ARG_MAX_REG)
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if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))
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cum->vregno++;
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else
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/* In variable-argument functions, vector arguments get GPRs allocated
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even if they are going to be passed in a vector register. */
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if (cum->stdarg && DEFAULT_ABI != ABI_V4)
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{
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int align;
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/* Vector parameters must be 16-byte aligned. This places them at
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2 mod 4 in terms of words (on both ABIs). */
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align = ((6 - (cum->words & 3)) & 3);
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/* Vector parameters must be 16-byte aligned. This places
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them at 2 mod 4 in terms of words in 32-bit mode, since
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the parameter save area starts at offset 24 from the
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stack. In 64-bit mode, they just have to start on an
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even word, since the parameter save area is 16-byte
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aligned. Space for GPRs is reserved even if the argument
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will be passed in memory. */
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if (TARGET_32BIT)
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align = ((6 - (cum->words & 3)) & 3);
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else
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align = cum->words & 1;
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cum->words += align + RS6000_ARG_SIZE (mode, type);
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if (TARGET_DEBUG_ARG)
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{
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fprintf (stderr, "function_adv: words = %2d, align=%d, ",
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cum->words, align);
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fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s\n",
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cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode));
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cum->nargs_prototype, cum->prototype,
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GET_MODE_NAME (mode));
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}
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}
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}
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@ -4099,40 +4124,43 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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return GEN_INT (cum->call_cookie);
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}
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if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
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if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))
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return gen_rtx_REG (mode, cum->vregno);
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else if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
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{
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if (named && cum->vregno <= ALTIVEC_ARG_MAX_REG)
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return gen_rtx_REG (mode, cum->vregno);
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else if (named || abi == ABI_V4)
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if (named || abi == ABI_V4)
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return NULL_RTX;
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else
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{
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/* Vector parameters to varargs functions under AIX or Darwin
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get passed in memory and possibly also in GPRs. */
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int align, align_words;
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rtx reg;
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enum machine_mode part_mode = mode;
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/* Vector parameters must be 16-byte aligned. This places them at
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2 mod 4 in terms of words. */
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align = ((6 - (cum->words & 3)) & 3);
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2 mod 4 in terms of words in 32-bit mode, since the parameter
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save area starts at offset 24 from the stack. In 64-bit mode,
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they just have to start on an even word, since the parameter
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save area is 16-byte aligned. */
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if (TARGET_32BIT)
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align = ((6 - (cum->words & 3)) & 3);
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else
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align = cum->words & 1;
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align_words = cum->words + align;
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/* Out of registers? Memory, then. */
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if (align_words >= GP_ARG_NUM_REG)
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return NULL_RTX;
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/* The vector value goes in both memory and GPRs. Varargs
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vector regs will always be saved in R5-R8 or R9-R12. */
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reg = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);
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return gen_rtx_PARALLEL (mode,
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gen_rtvec (2,
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gen_rtx_EXPR_LIST (VOIDmode,
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NULL_RTX,
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const0_rtx),
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gen_rtx_EXPR_LIST (VOIDmode,
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reg,
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const0_rtx)));
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/* The vector value goes in GPRs. Only the part of the
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value in GPRs is reported here. */
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if (align_words + CLASS_MAX_NREGS (mode, GENERAL_REGS)
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> GP_ARG_NUM_REG)
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/* Fortunately, there are only two possibilites, the value
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is either wholly in GPRs or half in GPRs and half not. */
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part_mode = DImode;
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return gen_rtx_REG (part_mode, GP_ARG_MIN_REG + align_words);
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}
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}
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else if (TARGET_SPE_ABI && TARGET_SPE && SPE_VECTOR_MODE (mode))
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@ -4183,7 +4211,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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&& (mode == DFmode || mode == DImode || mode == BLKmode))
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return rs6000_mixed_function_arg (cum, mode, type, align_words);
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if (USE_FP_FOR_ARG_P (*cum, mode, type))
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if (USE_FP_FOR_ARG_P (cum, mode, type))
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{
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if (! type
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|| ((cum->nargs_prototype > 0)
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@ -4228,13 +4256,13 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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int
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function_arg_partial_nregs (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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tree type, int named ATTRIBUTE_UNUSED)
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tree type, int named)
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{
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if (DEFAULT_ABI == ABI_V4)
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return 0;
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if (USE_FP_FOR_ARG_P (*cum, mode, type)
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|| USE_ALTIVEC_FOR_ARG_P (*cum, mode, type))
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if (USE_FP_FOR_ARG_P (cum, mode, type)
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|| USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))
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{
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if (cum->nargs_prototype >= 0)
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return 0;
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@ -1800,18 +1800,6 @@ typedef struct rs6000_args
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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function_arg_advance (&CUM, MODE, TYPE, NAMED)
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/* Nonzero if we can use a floating-point register to pass this arg. */
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#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
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(GET_MODE_CLASS (MODE) == MODE_FLOAT \
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&& (CUM).fregno <= FP_ARG_MAX_REG \
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&& TARGET_HARD_FLOAT && TARGET_FPRS)
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/* Nonzero if we can use an AltiVec register to pass this arg. */
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#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE) \
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(ALTIVEC_VECTOR_MODE (MODE) \
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&& (CUM).vregno <= ALTIVEC_ARG_MAX_REG \
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&& TARGET_ALTIVEC_ABI)
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/* Determine where to put an argument to a function.
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Value is zero to push the argument on the stack,
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or a hard register in which to store the argument.
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@ -1,3 +1,7 @@
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2003-11-06 Geoffrey Keating <geoffk@apple.com>
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* gcc.dg/altivec-varargs-1.c: New test.
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2003-11-05 Eric Botcazou <ebotcazou@libertysurf.fr>
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* gcc.c-torture/compile/20031023-4.c: XFAIL on SPARC64
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74
gcc/testsuite/gcc.dg/altivec-varargs-1.c
Normal file
74
gcc/testsuite/gcc.dg/altivec-varargs-1.c
Normal file
@ -0,0 +1,74 @@
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/* { dg-do run { target powerpc*-*-darwin* powerpc*-*-*altivec* } } */
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/* { dg-options "-maltivec" } */
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/* This test requires altivec, which means it'll fail on Darwin running
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on G3. FIXME. */
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#include <stdarg.h>
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#define vector __attribute__((mode(V4SI)))
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const vector unsigned int v1 = {10,11,12,13};
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const vector unsigned int v2 = {20,21,22,23};
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const vector unsigned int v3 = {30,31,32,33};
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const vector unsigned int v4 = {40,41,42,43};
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void foo(vector unsigned int a, ...)
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{
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va_list args;
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vector unsigned int v;
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va_start (args, a);
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if (memcmp (&a, &v1, sizeof (v)) != 0)
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abort ();
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v = va_arg (args, vector unsigned int);
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if (memcmp (&v, &v2, sizeof (v)) != 0)
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abort ();
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v = va_arg (args, vector unsigned int);
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if (memcmp (&v, &v3, sizeof (v)) != 0)
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abort ();
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v = va_arg (args, vector unsigned int);
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if (memcmp (&v, &v4, sizeof (v)) != 0)
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abort ();
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va_end (args);
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}
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void bar(vector unsigned int a, ...)
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{
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va_list args;
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vector unsigned int v;
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int b;
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va_start (args, a);
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if (memcmp (&a, &v1, sizeof (v)) != 0)
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abort ();
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b = va_arg (args, int);
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if (b != 2)
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abort ();
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v = va_arg (args, vector unsigned int);
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if (memcmp (&v, &v2, sizeof (v)) != 0)
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abort ();
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v = va_arg (args, vector unsigned int);
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if (memcmp (&v, &v3, sizeof (v)) != 0)
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abort ();
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va_end (args);
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}
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int main(void)
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{
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/* In this call, in the Darwin ABI, the first argument goes into v2
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the second one into r9-r10 and memory,
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and the next two in memory. */
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foo ((vector unsigned int){10,11,12,13},
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(vector unsigned int){20,21,22,23},
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(vector unsigned int){30,31,32,33},
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(vector unsigned int){40,41,42,43});
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/* In this call, in the Darwin ABI, the first argument goes into v2
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the second one into r9, then r10 is reserved and
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there are two words of padding in memory, and the next two arguments
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go after the padding. */
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bar ((vector unsigned int){10,11,12,13}, 2,
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(vector unsigned int){20,21,22,23},
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(vector unsigned int){30,31,32,33});
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return 0;
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}
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