diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a061e29db78f..eab56e7137af 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,10 @@
 2000-07-30  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
-	* config/c4x/libgcc.S: (divqf3): Improve accuracy.
+	* config/c4x/c4x.h (IS_XXX_REGNO): Rewrite to avoid unsigned warnings.
+
+2000-07-30  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
+
+	* config/c4x/libgcc.S (divqf3): Improve accuracy.
 
 2000-07-27  Mark Mitchell  <mark@codesourcery.com>
 
diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h
index 06f2873cc409..7f2a1092472b 100644
--- a/gcc/config/c4x/c4x.h
+++ b/gcc/config/c4x/c4x.h
@@ -449,17 +449,23 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
 
 /* Extended precision registers (low set).  */
 
-#define IS_R0R1_REGNO(r)           ((((r) >= R0_REGNO) && ((r) <= R1_REGNO)))
-#define IS_R2R3_REGNO(r)           ((((r) >= R2_REGNO) && ((r) <= R3_REGNO)))
-#define IS_EXT_LOW_REGNO(r)        ((((r) >= R0_REGNO) && ((r) <= R7_REGNO)))
+#define IS_R0R1_REGNO(r) \
+     ((unsigned int)((r) - R0_REGNO) <= (R1_REGNO - R0_REGNO))
+#define IS_R2R3_REGNO(r) \
+     ((unsigned int)((r) - R2_REGNO) <= (R3_REGNO - R2_REGNO))   
+#define IS_EXT_LOW_REGNO(r) \
+     ((unsigned int)((r) - R0_REGNO) <= (R7_REGNO - R0_REGNO))   
 
 /* Extended precision registers (high set).  */
 
-#define IS_EXT_HIGH_REGNO(r)       (! TARGET_C3X \
-			            && ((r) >= R8_REGNO) && ((r) <= R11_REGNO))
+#define IS_EXT_HIGH_REGNO(r) \
+(! TARGET_C3X \
+ && ((unsigned int) ((r) - R8_REGNO) <= (R11_REGNO - R8_REGNO)))
+
 /* Address registers.  */
 
-#define IS_AUX_REGNO(r)    (((r) >= AR0_REGNO) && ((r) <= AR7_REGNO))
+#define IS_AUX_REGNO(r) \
+    ((unsigned int)((r) - AR0_REGNO) <= (AR7_REGNO - AR0_REGNO))   
 #define IS_ADDR_REGNO(r)   IS_AUX_REGNO(r)
 #define IS_DP_REGNO(r)     ((r) == DP_REGNO)
 #define IS_INDEX_REGNO(r)  (((r) == IR0_REGNO) || ((r) == IR1_REGNO))