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invoke.texi (ARM Options): Improve wording slightly.
2001-05-24 Philip Blundell <philb@gnu.org> * invoke.texi (ARM Options): Improve wording slightly. Add documentation for more options, including those for Thumb mode. Don't mention options that don't exist or are unimplemented. (Thumb Options): Delete; merged into above section. From-SVN: r42539
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@ -1,3 +1,10 @@
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2001-05-24 Philip Blundell <philb@gnu.org>
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* invoke.texi (ARM Options): Improve wording slightly. Add
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documentation for more options, including those for Thumb mode.
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Don't mention options that don't exist or are unimplemented.
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(Thumb Options): Delete; merged into above section.
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2001-05-24 Geoff Keating <geoffk@redhat.com>
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* config/rs6000/linux.h (SIGNAL_FRAMESIZE): Define.
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155
gcc/invoke.texi
155
gcc/invoke.texi
@ -369,27 +369,18 @@ in the following sections.
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-malignment-traps -mno-alignment-traps @gol
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-msoft-float -mhard-float -mfpe @gol
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-mthumb-interwork -mno-thumb-interwork @gol
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-mcpu= -march= -mfpe= @gol
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-mstructure-size-boundary= @gol
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-mcpu=@var{name} -march=@var{name} -mfpe=@var{name} @gol
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-mstructure-size-boundary=@var{n} @gol
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-mbsd -mxopen -mno-symrename @gol
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-mabort-on-noreturn @gol
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-mlong-calls -mno-long-calls @gol
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-mnop-fun-dllimport -mno-nop-fun-dllimport @gol
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-msingle-pic-base -mno-single-pic-base @gol
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-mpic-register=}
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@emph{Thumb Options}
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@gccoptlist{
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-mtpcs-frame -mno-tpcs-frame @gol
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-mtpcs-leaf-frame -mno-tpcs-leaf-frame @gol
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-mlittle-endian -mbig-endian @gol
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-mthumb-interwork -mno-thumb-interwork @gol
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-mstructure-size-boundary= @gol
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-mnop-fun-dllimport -mno-nop-fun-dllimport @gol
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-mcallee-super-interworking -mno-callee-super-interworking @gol
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-mcaller-super-interworking -mno-caller-super-interworking @gol
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-msingle-pic-base -mno-single-pic-base @gol
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-mpic-register=}
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-mpic-register=@var{reg} @gol
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-mnop-fun-dllimport @gol
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-mpoke-function-name @gol
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-mthumb -marm @gol
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-mtpcs-frame -mtpcs-leaf-frame @gol
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-mcaller-super-interworking -mcallee-super-interworking }
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@emph{MN10200 Options}
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@gccoptlist{
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@ -4617,7 +4608,6 @@ that macro, which enables you to change the defaults.
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* Convex Options::
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* AMD29K Options::
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* ARM Options::
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* Thumb Options::
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* MN10200 Options::
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* MN10300 Options::
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* M32R/D Options::
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@ -5290,6 +5280,8 @@ and conforming to the function calling standards for the APCS 32-bit
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option. This option replaces the @samp{-m6} option of previous releases
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of the compiler.
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@ignore
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@c not currently implemented
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@item -mapcs-stack-check
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@kindex -mapcs-stack-check
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@kindex -mno-apcs-stack-check
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@ -5301,6 +5293,7 @@ called, depending upon the amount of stack space required. The run time
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system is required to provide these functions. The default is
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@samp{-mno-apcs-stack-check}, since this produces smaller code.
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@c not currently implemented
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@item -mapcs-float
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@kindex -mapcs-float
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@kindex -mno-apcs-float
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@ -5311,17 +5304,18 @@ arithmetic is going to be performed by the code. The default is
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@samp{-mno-apcs-float}, since integer only code is slightly increased in
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size if @samp{-mapcs-float} is used.
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@c not currently implemented
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@item -mapcs-reentrant
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@kindex -mapcs-reentrant
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@kindex -mno-apcs-reentrant
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Generate reentrant, position independent code. This is the equivalent
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to specifying the @samp{-fpic} option. The default is
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Generate reentrant, position independent code. The default is
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@samp{-mno-apcs-reentrant}.
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@end ignore
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@item -mthumb-interwork
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@kindex -mthumb-interwork
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@kindex -mno-thumb-interwork
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Generate code which supports calling between the ARM and THUMB
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Generate code which supports calling between the ARM and Thumb
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instruction sets. Without this option the two instruction sets cannot
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be reliably used inside one program. The default is
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@samp{-mno-thumb-interwork}, since slightly larger code is generated
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@ -5393,7 +5387,7 @@ objects in memory.
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@kindex -mno-alignment-traps
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Generate code that assumes that the MMU will not trap unaligned
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accesses. This produces better code when the target instruction set
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does not have half-word memory operations (implementations prior to
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does not have half-word memory operations (i.e. implementations prior to
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ARMv4).
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Note that you cannot use this option to access unaligned word objects,
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@ -5405,20 +5399,16 @@ this produces better code when there are no half-word memory
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instructions available.
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@item -mshort-load-bytes
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@itemx -mno-short-load-words
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@kindex -mshort-load-bytes
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This is a deprecated alias for @samp{-malignment-traps}.
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@kindex -mno-short-load-words
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These are deprecated aliases for @samp{-malignment-traps}.
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@item -mno-short-load-bytes
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@itemx -mshort-load-words
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@kindex -mno-short-load-bytes
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This is a deprecated alias for @samp{-mno-alignment-traps}.
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@item -mshort-load-words
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@kindex -mshort-load-words
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This is a deprecated alias for @samp{-mno-alignment-traps}.
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@item -mno-short-load-words
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@kindex -mno-short-load-words
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This is a deprecated alias for @samp{-malignment-traps}.
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This are deprecated aliases for @samp{-mno-alignment-traps}.
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@item -mbsd
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@kindex -mbsd
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@ -5442,12 +5432,13 @@ compiler is built for cross-compilation.
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@item -mcpu=<name>
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@kindex -mcpu=
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This specifies the name of the target ARM processor. GCC uses this name
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to determine what kind of instructions it can use when generating
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to determine what kind of instructions it can emit when generating
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assembly code. Permissible names are: arm2, arm250, arm3, arm6, arm60,
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arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi,
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arm70, arm700, arm700i, arm710, arm710c, arm7100, arm7500, arm7500fe,
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arm7tdmi, arm8, strongarm, strongarm110, strongarm1100, arm8, arm810,
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arm9, arm920, arm920t, arm9tdmi.
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arm9, arm9e, arm920, arm920t, arm940t, arm9tdmi, arm10tdmi, arm1020t,
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xscale.
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@itemx -mtune=<name>
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@kindex -mtune=
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@ -5457,16 +5448,16 @@ restricting which instructions can be used, it specifies that GCC should
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tune the performance of the code as if the target were of the type
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specified in this option, but still choosing the instructions that it
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will generate based on the cpu specified by a @samp{-mcpu=} option.
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For some arm implementations better performance can be obtained by using
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For some ARM implementations better performance can be obtained by using
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this option.
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@item -march=<name>
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@kindex -march=
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This specifies the name of the target ARM architecture. GCC uses this
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name to determine what kind of instructions it can use when generating
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name to determine what kind of instructions it can emit when generating
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assembly code. This option can be used in conjunction with or instead
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of the @samp{-mcpu=} option. Permissible names are: armv2, armv2a,
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armv3, armv3m, armv4, armv4t, armv5.
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armv3, armv3m, armv4, armv4t, armv5, armv5t, armv5te.
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@item -mfpe=<number>
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@itemx -mfp=<number>
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@ -5474,7 +5465,7 @@ armv3, armv3m, armv4, armv4t, armv5.
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@kindex -mfp=
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This specifies the version of the floating point emulation available on
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the target. Permissible values are 2 and 3. @samp{-mfp=} is a synonym
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for @samp{-mfpe=} to support older versions of GCC.
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for @samp{-mfpe=}, for compatibility with older versions of GCC.
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@item -mstructure-size-boundary=<n>
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@kindex -mstructure-size-boundary
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@ -5486,14 +5477,14 @@ can produce faster, more efficient code, but can also increase the size
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of the program. The two values are potentially incompatible. Code
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compiled with one value cannot necessarily expect to work with code or
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libraries compiled with the other value, if they exchange information
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using structures or unions. Programmers are encouraged to use the 32
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value as future versions of the toolchain may default to this value.
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using structures or unions.
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@item -mabort-on-noreturn
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@kindex -mabort-on-noreturn
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@kindex -mnoabort-on-noreturn
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Generate a call to the function abort at the end of a noreturn function.
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It will be executed if the function tries to return.
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Generate a call to the function @code{abort} at the end of a
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@code{noreturn} function. It will be executed if the function tries to
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return.
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@item -mlong-calls
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@itemx -mno-long-calls
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@ -5515,7 +5506,7 @@ the scope of a @samp{#pragma long_calls} directive, will always be
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turned into long calls.
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This feature is not enabled by default. Specifying
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@samp{--no-long-calls} will restore the default behaviour, as will
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@samp{-mno-long-calls} will restore the default behaviour, as will
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placing the function calls within the scope of a @samp{#pragma
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long_calls_off} directive. Note these switches have no effect on how
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the compiler generates code to handle function calls via function
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@ -5523,7 +5514,7 @@ pointers.
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@item -mnop-fun-dllimport
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@kindex -mnop-fun-dllimport
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Disable the support for the @emph{dllimport} attribute.
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Disable support for the @emph{dllimport} attribute.
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@item -msingle-pic-base
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@kindex -msingle-pic-base
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@ -5537,62 +5528,47 @@ before execution begins.
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Specify the register to be used for PIC addressing. The default is R10
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unless stack-checking is enabled, when R9 is used.
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@end table
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@item -mpoke-function-name
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@kindex -mpoke-function-name
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Write the name of each function into the text section, directly
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preceding the function prologue. The generated code is similar to this:
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@node Thumb Options
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@subsection Thumb Options
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@cindex Thumb Options
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@smallexample
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t0
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.ascii "arm_poke_function_name", 0
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.align
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t1
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.word 0xff000000 + (t1 - t0)
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arm_poke_function_name
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mov ip, sp
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stmfd sp!, @{fp, ip, lr, pc@}
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sub fp, ip, #4
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@end smallexample
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@table @gcctabopt
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When performing a stack backtrace, code can inspect the value of
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@code{pc} stored at @code{fp + 0}. If the trace function then looks at
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location @code{pc - 12} and the top 8 bits are set, then we know that
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there is a function name embedded immediately preceding this location
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and has length @code{((pc[-3]) & 0xff000000)}.
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@item -mthumb-interwork
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@kindex -mthumb-interwork
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@kindex -mno-thumb-interwork
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Generate code which supports calling between the THUMB and ARM
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instruction sets. Without this option the two instruction sets cannot
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be reliably used inside one program. The default is
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@samp{-mno-thumb-interwork}, since slightly smaller code is generated
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with this option.
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@item -mthumb
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@kindex -mthumb
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Generate code for the 16-bit Thumb instruction set. The default is to
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use the 32-bit ARM instruction set.
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@item -mtpcs-frame
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@kindex -mtpcs-frame
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@kindex -mno-tpcs-frame
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Generate a stack frame that is compliant with the Thumb Procedure Call
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Standard for all non-leaf functions. (A leaf function is one that does
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not call any other functions). The default is @samp{-mno-apcs-frame}.
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not call any other functions.) The default is @samp{-mno-tpcs-frame}.
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@item -mtpcs-leaf-frame
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@kindex -mtpcs-leaf-frame
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@kindex -mno-tpcs-leaf-frame
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Generate a stack frame that is compliant with the Thumb Procedure Call
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Standard for all leaf functions. (A leaf function is one that does
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not call any other functions). The default is @samp{-mno-apcs-leaf-frame}.
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@item -mlittle-endian
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@kindex -mlittle-endian
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Generate code for a processor running in little-endian mode. This is
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the default for all standard configurations.
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@item -mbig-endian
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@kindex -mbig-endian
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Generate code for a processor running in big-endian mode.
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@item -mstructure-size-boundary=<n>
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@kindex -mstructure-size-boundary
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The size of all structures and unions will be rounded up to a multiple
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of the number of bits set by this option. Permissible values are 8 and
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32. The default value varies for different toolchains. For the COFF
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targeted toolchain the default value is 8. Specifying the larger number
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can produced faster, more efficient code, but can also increase the size
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of the program. The two values are potentially incompatible. Code
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compiled with one value cannot necessarily expect to work with code or
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libraries compiled with the other value, if they exchange information
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using structures or unions. Programmers are encouraged to use the 32
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value as future versions of the toolchain may default to this value.
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@item -mnop-fun-dllimport
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@kindex -mnop-fun-dllimport
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Disable the support for the @emph{dllimport} attribute.
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not call any other functions.) The default is @samp{-mno-apcs-leaf-frame}.
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@item -mcallee-super-interworking
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@kindex -mcallee-super-interworking
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@ -5608,17 +5584,6 @@ execute correctly regardless of whether the target code has been
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compiled for interworking or not. There is a small overhead in the cost
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of executing a function pointer if this option is enabled.
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@item -msingle-pic-base
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@kindex -msingle-pic-base
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Treat the register used for PIC addressing as read-only, rather than
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loading it in the prologue for each function. The run-time system is
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responsible for initialising this register with an appropriate value
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before execution begins.
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@item -mpic-register=<reg>
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@kindex -mpic-register=
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Specify the register to be used for PIC addressing. The default is R10.
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@end table
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@node MN10200 Options
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