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i386.md (*add<mode>_1): Split insn to lea.
* config/i386/i386.md (*add<mode>_1) <TYPE_LEA>: Split insn to lea. <default>: Swap operands 1 and 2 for alternative 2 to use existing code to output insn mnemonic. Fix comment. (*addsi_1_zext): Add r-r-0 alternative 1. <TYPE_LEA>: Split insn to lea. <default>: Handle alternative 1. (*addhi_1_lea): Add r-r-0 alternative 2. Use cond RTX instead of multi-level if_then_else RTX to set "type" attribute. <default>: Handle alternative 2. (*addqi_1_lea): Add q-q-0 alternative 2 and r-r-0 alternative 4. Use cond RTX instead of multi-level if_then_else RTX to set "type" attribute. <default>: Handle alternatives 2 and 4. (lea splitters): Update calls to ix86_lea_for_add_ok. * config/i386/i386.c (ix86_lea_for_add_ok): Remove unused "code" argument. * config/i386/i386-protos.h (ix86_lea_for_add_ok): Update prototype. From-SVN: r163351
This commit is contained in:
Uros Bizjak
parent
9a18b99ba9
commit
21667997d0
@ -1,3 +1,24 @@
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2010-08-18 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*add<mode>_1) <TYPE_LEA>: Split insn to lea.
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<default>: Swap operands 1 and 2 for alternative 2 to use existing
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code to output insn mnemonic. Fix comment.
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(*addsi_1_zext): Add r-r-0 alternative 1.
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<TYPE_LEA>: Split insn to lea.
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<default>: Handle alternative 1.
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(*addhi_1_lea): Add r-r-0 alternative 2. Use cond RTX instead of
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multi-level if_then_else RTX to set "type" attribute.
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<default>: Handle alternative 2.
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(*addqi_1_lea): Add q-q-0 alternative 2 and r-r-0 alternative 4.
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Use cond RTX instead of multi-level if_then_else RTX to set
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"type" attribute.
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<default>: Handle alternatives 2 and 4.
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(lea splitters): Update calls to ix86_lea_for_add_ok.
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* config/i386/i386.c (ix86_lea_for_add_ok): Remove unused "code"
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argument.
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* config/i386/i386-protos.h (ix86_lea_for_add_ok): Update prototype.
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2010-08-18 Richard Guenther <rguenther@suse.de>
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* tree-ssa-uninit.c (find_uninit_use): Disregard debug stmts,
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@ -12,7 +33,7 @@
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2010-08-18 Yao Qi <yao@codesourcery.com>
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PR target/45094
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* config/arm/arm.c (output_move_double): Fix typo generating
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* config/arm/arm.c (output_move_double): Fix typo generating
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instructions ('ldr'->'str').
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2010-08-18 Maxim Kuvyrkov <maxim@codesourcery.com>
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@ -66,21 +87,19 @@
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* config/i386/i386.c (ix86_lea_for_add_ok): For !TARGET_OPT_AGU
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or optimizing for size, always avoid lea if possible.
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* config/i386/i386.md (*add<mode>_1): Always avoid lea if
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possible.
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* config/i386/i386.md (*add<mode>_1): Always avoid lea if possible.
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2010-08-17 Iain Sandoe <iains@gcc.gnu.org>
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* unwind-dw2-fde-darwin.c (_darwin10_Unwind_FindEnclosingFunction):
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Dunmmy function with NULL return unless the target is
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Dunmmy function with NULL return unless the target is
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OSX >= 10.6 (Darwin10).
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2010-08-17 Jack Howarth <howarth@bromo.med.uc.edu>
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* gcc.c (spec_function): Add remove-outfile.
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(remove_outfile_spec_function): New function.
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* config/darwin.h (LINK_SPEC): Add removal of
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-ldl, -lm and -lpthread.
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* config/darwin.h (LINK_SPEC): Add removal of -ldl, -lm and -lpthread.
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* invoke.texi (replace-outfile): Document.
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2010-08-17 Uros Bizjak <ubizjak@gmail.com>
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@ -105,8 +124,7 @@
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2010-08-17 Richard Guenther <rguenther@suse.de>
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* fold-const.c (fold_comparison): Strip nops inside
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POINTER_PLUS_EXPR.
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* fold-const.c (fold_comparison): Strip nops inside POINTER_PLUS_EXPR.
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2010-08-17 Shujing Zhao <pearly.zhao@oracle.com>
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@ -86,7 +86,7 @@ extern void ix86_fixup_binary_operands_no_copy (enum rtx_code,
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extern void ix86_expand_binary_operator (enum rtx_code,
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enum machine_mode, rtx[]);
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extern int ix86_binary_operator_ok (enum rtx_code, enum machine_mode, rtx[]);
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extern bool ix86_lea_for_add_ok (enum rtx_code, rtx, rtx[]);
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extern bool ix86_lea_for_add_ok (rtx, rtx[]);
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extern bool ix86_vec_interleave_v2df_operator_ok (rtx operands[3], bool high);
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extern bool ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn);
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extern bool ix86_agi_dependent (rtx set_insn, rtx use_insn);
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@ -14808,8 +14808,7 @@ distance_agu_use (unsigned int regno0, rtx insn)
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used soon, LEA is better and otherwise ADD is better. */
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bool
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ix86_lea_for_add_ok (enum rtx_code code ATTRIBUTE_UNUSED,
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rtx insn, rtx operands[])
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ix86_lea_for_add_ok (rtx insn, rtx operands[])
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{
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unsigned int regno0 = true_regnum (operands[0]);
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unsigned int regno1 = true_regnum (operands[1]);
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@ -5799,8 +5799,7 @@
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switch (get_attr_type (insn))
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{
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case TYPE_LEA:
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operands[2] = SET_SRC (XVECEXP (PATTERN (insn), 0, 0));
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return "lea{<imodesuffix>}\t{%a2, %0|%0, %a2}";
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return "#";
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case TYPE_INCDEC:
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gcc_assert (rtx_equal_p (operands[0], operands[1]));
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@ -5813,11 +5812,13 @@
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}
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default:
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/* This alternative was added for TARGET_OPT_AGU to use add as
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much as possible. But add is also faster than lea for
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!TARGET_OPT_AGU. */
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/* For most processors, ADD is faster than LEA. This alternative
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was added to use ADD as much as possible. */
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if (which_alternative == 2)
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return "add{<imodesuffix>}\t{%1, %0|%0, %1}";
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{
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rtx tmp;
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tmp = operands[1], operands[1] = operands[2], operands[2] = tmp;
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}
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gcc_assert (rtx_equal_p (operands[0], operands[1]));
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if (x86_maybe_negate_const_int (&operands[2], <MODE>mode))
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@ -5847,18 +5848,17 @@
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;; patterns constructed from addsi_1 to match.
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(define_insn "*addsi_1_zext"
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[(set (match_operand:DI 0 "register_operand" "=r,r")
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[(set (match_operand:DI 0 "register_operand" "=r,r,r")
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(zero_extend:DI
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(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r")
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(match_operand:SI 2 "general_operand" "g,li"))))
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(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r,r")
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(match_operand:SI 2 "general_operand" "g,0,li"))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
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{
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switch (get_attr_type (insn))
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{
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case TYPE_LEA:
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operands[2] = XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0);
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return "lea{l}\t{%a2, %k0|%k0, %a2}";
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return "#";
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case TYPE_INCDEC:
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if (operands[2] == const1_rtx)
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@ -5870,6 +5870,14 @@
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}
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default:
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/* For most processors, ADD is faster than LEA. This alternative
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was added to use ADD as much as possible. */
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if (which_alternative == 1)
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{
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rtx tmp;
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tmp = operands[1], operands[1] = operands[2], operands[2] = tmp;
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}
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if (x86_maybe_negate_const_int (&operands[2], SImode))
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return "sub{l}\t{%2, %k0|%k0, %2}";
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@ -5877,7 +5885,7 @@
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}
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}
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[(set (attr "type")
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(cond [(eq_attr "alternative" "1")
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(cond [(eq_attr "alternative" "2")
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(const_string "lea")
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(match_operand:SI 2 "incdec_operand" "")
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(const_string "incdec")
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@ -5932,9 +5940,9 @@
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;; for PII, and in fact harmful because of partial register stalls.
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(define_insn "*addhi_1_lea"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r")
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(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r")
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(match_operand:HI 2 "general_operand" "rn,rm,ln")))
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,r,r")
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(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r,r")
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(match_operand:HI 2 "general_operand" "rmn,rn,0,ln")))
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(clobber (reg:CC FLAGS_REG))]
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"!TARGET_PARTIAL_REG_STALL
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&& ix86_binary_operator_ok (PLUS, HImode, operands)"
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@ -5955,6 +5963,14 @@
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}
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default:
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/* For most processors, ADD is faster than LEA. This alternative
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was added to use ADD as much as possible. */
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if (which_alternative == 2)
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{
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rtx tmp;
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tmp = operands[1], operands[1] = operands[2], operands[2] = tmp;
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}
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gcc_assert (rtx_equal_p (operands[0], operands[1]));
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if (x86_maybe_negate_const_int (&operands[2], HImode))
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return "sub{w}\t{%2, %0|%0, %2}";
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@ -5963,18 +5979,20 @@
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}
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}
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[(set (attr "type")
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(if_then_else (eq_attr "alternative" "2")
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(const_string "lea")
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(if_then_else (match_operand:HI 2 "incdec_operand" "")
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(const_string "incdec")
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(const_string "alu"))))
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(cond [(eq_attr "alternative" "3")
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(const_string "lea")
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(match_operand:HI 2 "incdec_operand" "")
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(const_string "incdec")
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]
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(const_string "alu")))
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(set (attr "length_immediate")
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(if_then_else
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(and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
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(const_string "1")
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(const_string "*")))
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(set_attr "mode" "HI,HI,SI")])
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(set_attr "mode" "HI,HI,HI,SI")])
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;; %%% Potential partial reg stall on alternative 2. What to do?
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(define_insn "*addqi_1"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
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(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
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@ -6020,16 +6038,17 @@
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(const_string "*")))
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(set_attr "mode" "QI,QI,SI")])
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;; %%% Potential partial reg stall on alternative 2. What to do?
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;; %%% Potential partial reg stall on alternatives 3 and 4. What to do?
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(define_insn "*addqi_1_lea"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r,r")
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(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,r")
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(match_operand:QI 2 "general_operand" "qn,qmn,rn,ln")))
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[(set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,q,r,r,r")
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(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,q,0,r,r")
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(match_operand:QI 2 "general_operand" "qmn,qn,0,rn,0,ln")))
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(clobber (reg:CC FLAGS_REG))]
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"!TARGET_PARTIAL_REG_STALL
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&& ix86_binary_operator_ok (PLUS, QImode, operands)"
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{
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int widen = (which_alternative == 2);
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int widen = (which_alternative == 3 || which_alternative == 4);
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switch (get_attr_type (insn))
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{
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case TYPE_LEA:
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@ -6046,6 +6065,14 @@
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}
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default:
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/* For most processors, ADD is faster than LEA. These alternatives
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were added to use ADD as much as possible. */
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if (which_alternative == 2 || which_alternative == 4)
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{
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rtx tmp;
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tmp = operands[1], operands[1] = operands[2], operands[2] = tmp;
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}
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gcc_assert (rtx_equal_p (operands[0], operands[1]));
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if (x86_maybe_negate_const_int (&operands[2], QImode))
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{
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@ -6061,17 +6088,18 @@
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}
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}
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[(set (attr "type")
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(if_then_else (eq_attr "alternative" "3")
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(const_string "lea")
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(if_then_else (match_operand:QI 2 "incdec_operand" "")
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(const_string "incdec")
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(const_string "alu"))))
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(cond [(eq_attr "alternative" "5")
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(const_string "lea")
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(match_operand:QI 2 "incdec_operand" "")
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(const_string "incdec")
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]
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(const_string "alu")))
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(set (attr "length_immediate")
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(if_then_else
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(and (eq_attr "type" "alu") (match_operand 2 "const128_operand" ""))
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(const_string "1")
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(const_string "*")))
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(set_attr "mode" "QI,QI,SI,SI")])
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(set_attr "mode" "QI,QI,QI,SI,SI,SI")])
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(define_insn "*addqi_1_slp"
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[(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
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@ -6658,7 +6686,7 @@
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(match_operand:DI 2 "x86_64_nonmemory_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& ix86_lea_for_add_ok (PLUS, insn, operands)"
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&& ix86_lea_for_add_ok (insn, operands)"
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[(set (match_dup 0)
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(plus:DI (match_dup 1)
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(match_dup 2)))]
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@ -6670,7 +6698,7 @@
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(plus (match_operand 1 "register_operand" "")
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(match_operand 2 "nonmemory_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed && ix86_lea_for_add_ok (PLUS, insn, operands)"
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"reload_completed && ix86_lea_for_add_ok (insn, operands)"
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[(const_int 0)]
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{
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rtx pat;
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