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* mn10200.md (bset, bclr): Operand 0 is a read/write operand.
From-SVN: r25134
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@ -17,6 +17,8 @@ Wed Feb 10 09:57:08 1999 Mark Mitchell <mark@markmitchell.com>
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Wed Feb 10 10:09:41 1999 Jeffrey A Law (law@cygnus.com)
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* mn10200.md (bset, bclr): Operand 0 is a read/write operand.
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* reload1.c (reload_combine_note_store): Second argument is no
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longer unused/ignored. Handle multi-register hard regs.
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(move2add_note_store): Simplify.
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@ -656,7 +656,7 @@
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;; These clears a constant set of bits in memory or in a register.
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;; We must support register destinations to make reload happy.
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "R,d")
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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(subreg:QI
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(and:HI (subreg:HI (match_dup 0) 0)
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(match_operand 1 "const_int_operand" "")) 0))
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@ -669,7 +669,7 @@
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;; This clears a variable set of bits in memory or in a register.
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "R,d")
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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(subreg:QI
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(and:HI (subreg:HI (match_dup 0) 0)
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(not:HI (match_operand:HI 1 "general_operand" "d,d"))) 0))
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@ -681,7 +681,7 @@
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[(set_attr "cc" "clobber")])
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "R,d")
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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(subreg:QI
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(and:HI (not:HI (match_operand:HI 1 "general_operand" "d,d"))
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(subreg:HI (match_dup 0) 0)) 0))
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@ -694,7 +694,7 @@
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;; These set bits in memory.
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "R,d")
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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(subreg:QI
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(ior:HI (subreg:HI (match_dup 0) 0)
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(match_operand:HI 1 "general_operand" "d,d")) 0))]
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@ -705,11 +705,11 @@
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[(set_attr "cc" "clobber")])
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(define_insn ""
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[(set (match_operand:QI 0 "general_operand" "R,d")
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[(set (match_operand:QI 0 "general_operand" "+R,d")
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(subreg:QI
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(ior:HI (match_operand:HI 1 "general_operand" "d,d")
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(subreg:HI (match_dup 0) 0)) 0))]
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""
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"0"
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"@
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bset %1,%0
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or %1,%0"
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