From 1f561f9ba415e6252c29aaad13e6637ed9cc1f07 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hongjiu.lu@intel.com>
Date: Thu, 14 Oct 2010 02:11:59 +0000
Subject: [PATCH] Add a testcase for PR target/44180.

2010-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/44180
	* gcc.target/i386/pr44180.c: New.

From-SVN: r165445
---
 gcc/testsuite/ChangeLog                 |  5 ++++
 gcc/testsuite/gcc.target/i386/pr44180.c | 35 +++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr44180.c

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e7d06f0be0b5..5e10ba5f7910 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2010-10-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/44180
+	* gcc.target/i386/pr44180.c: New.
+
 2010-10-13  Jason Merrill  <jason@redhat.com>
 
 	* g++.dg/template/canon-type-8.C: New.
diff --git a/gcc/testsuite/gcc.target/i386/pr44180.c b/gcc/testsuite/gcc.target/i386/pr44180.c
new file mode 100644
index 000000000000..b27b7bab60c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr44180.c
@@ -0,0 +1,35 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
+/* { dg-options "-O2 -ftree-vectorize -mavx" } */
+
+#include "avx-check.h"
+
+#define N 16
+
+float b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
+float c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
+float d[N] = {0,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30};
+
+static void
+__attribute__ ((noinline))
+avx_test ()
+{
+  int i;
+  float a[N];
+
+  /* Strided access. Vectorizable on platforms that support load of strided 
+     accesses (extract of even/odd vector elements).  */
+  for (i = 0; i < N/2; i++)
+    {
+      a[i] = b[2*i+1] * c[2*i+1] - b[2*i] * c[2*i];
+      d[i] = b[2*i] * c[2*i+1] + b[2*i+1] * c[2*i];
+    }
+
+  /* Check results.  */
+  for (i = 0; i < N/2; i++)
+    {
+      if (a[i] != b[2*i+1] * c[2*i+1] - b[2*i] * c[2*i]
+	  || d[i] != b[2*i] * c[2*i+1] + b[2*i+1] * c[2*i])
+	abort();
+    }
+}