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configure.ac: Check __mips64 when setting host_address.
libgcc/ * configure.ac: Check __mips64 when setting host_address. * configure: Regenerate. * config.host (mips*-*-*): Add t-softfp-sfdf, mips/t-softfp-tf, mips/t-mips64 and t-softfp. (mips*-*-linux*): Don't add mips/t-tpbit. * config/mips/t-mips (LIB2_SIDITI_CONV_FUNCS, FPBIT, FPBIT_CFLAGS) (DPBIT, DPBIT_CFLAGS): Delete. * config/mips/sfp-machine.h: New file. * config/mips/t-mips64: Likewise. * config/mips/t-softfp-tf: Likewise. * config/mips/t-tpbit: Delete. From-SVN: r207403
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
70b2d364cc
commit
1ea0a6515f
@ -1,3 +1,17 @@
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2014-02-02 Richard Sandiford <rdsandiford@googlemail.com>
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* configure.ac: Check __mips64 when setting host_address.
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* configure: Regenerate.
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* config.host (mips*-*-*): Add t-softfp-sfdf, mips/t-softfp-tf,
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mips/t-mips64 and t-softfp.
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(mips*-*-linux*): Don't add mips/t-tpbit.
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* config/mips/t-mips (LIB2_SIDITI_CONV_FUNCS, FPBIT, FPBIT_CFLAGS)
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(DPBIT, DPBIT_CFLAGS): Delete.
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* config/mips/sfp-machine.h: New file.
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* config/mips/t-mips64: Likewise.
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* config/mips/t-softfp-tf: Likewise.
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* config/mips/t-tpbit: Delete.
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2014-01-29 Marcus Shawcroft <marcus.shawcroft@arm.com>
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* config/aarch64/sfp-machine.h (_FP_I_TYPE): Define
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@ -140,8 +140,16 @@ microblaze*-*-*)
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cpu_type=microblaze
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;;
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mips*-*-*)
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# All MIPS targets provide a full set of FP routines.
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cpu_type=mips
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tmake_file=mips/t-mips
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tmake_file="mips/t-mips t-softfp-sfdf"
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if test "${ac_cv_sizeof_long_double}" = 16; then
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tmake_file="${tmake_file} mips/t-softfp-tf"
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fi
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if test "${host_address}" = 64; then
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tmake_file="${tmake_file} mips/t-mips64"
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fi
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tmake_file="${tmake_file} t-softfp"
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;;
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nds32*-*)
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cpu_type=nds32
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@ -776,9 +784,6 @@ mips*-*-linux*) # Linux MIPS, either endian.
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;;
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esac
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md_unwind_header=mips/linux-unwind.h
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if test "${ac_cv_sizeof_long_double}" = 16; then
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tmake_file="${tmake_file} mips/t-tpbit"
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fi
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;;
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mips*-sde-elf*)
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tmake_file="$tmake_file mips/t-crtstuff mips/t-mips16"
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178
libgcc/config/mips/sfp-machine.h
Normal file
178
libgcc/config/mips/sfp-machine.h
Normal file
@ -0,0 +1,178 @@
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/* softfp machine description for MIPS.
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Copyright (C) 2009-2014 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifdef __mips64
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#define _FP_W_TYPE_SIZE 64
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#define _FP_W_TYPE unsigned long long
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#define _FP_WS_TYPE signed long long
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#define _FP_I_TYPE long long
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typedef int TItype __attribute__ ((mode (TI)));
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typedef unsigned int UTItype __attribute__ ((mode (TI)));
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#define TI_BITS (__CHAR_BIT__ * (int) sizeof (TItype))
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
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#ifdef __mips_nan2008
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# define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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# define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
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# define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
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#else
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# define _FP_NANFRAC_S (_FP_QNANBIT_S - 1)
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# define _FP_NANFRAC_D (_FP_QNANBIT_D - 1)
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# define _FP_NANFRAC_Q (_FP_QNANBIT_Q - 1), -1
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#endif
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#else
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#define _FP_W_TYPE_SIZE 32
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#define _FP_W_TYPE unsigned int
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#define _FP_WS_TYPE signed int
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#define _FP_I_TYPE int
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
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#ifdef __mips_nan2008
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# define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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# define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
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# define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
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#else
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# define _FP_NANFRAC_S (_FP_QNANBIT_S - 1)
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# define _FP_NANFRAC_D (_FP_QNANBIT_D - 1), -1
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# define _FP_NANFRAC_Q (_FP_QNANBIT_Q - 1), -1, -1, -1
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#endif
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#endif
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/* The type of the result of a floating point comparison. This must
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match __libgcc_cmp_return__ in GCC for the target. */
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typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
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#define CMPtype __gcc_CMPtype
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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#ifdef __mips_nan2008
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# define _FP_QNANNEGATEDP 0
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#else
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# define _FP_QNANNEGATEDP 1
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#endif
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/* Comment from glibc: */
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/* From my experiments it seems X is chosen unless one of the
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NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(X) | \
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_FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \
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{ \
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R##_s = _FP_NANSIGN_##fs; \
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_FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \
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} \
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else \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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#ifdef __mips_hard_float
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#define FP_EX_INVALID 0x40
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#define FP_EX_DIVZERO 0x20
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#define FP_EX_OVERFLOW 0x10
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#define FP_EX_UNDERFLOW 0x08
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#define FP_EX_INEXACT 0x04
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#define FP_EX_ALL \
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(FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \
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| FP_EX_INEXACT)
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#define FP_EX_ENABLE_SHIFT 5
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#define FP_EX_CAUSE_SHIFT 10
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#define FP_RND_NEAREST 0x0
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#define FP_RND_ZERO 0x1
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#define FP_RND_PINF 0x2
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#define FP_RND_MINF 0x3
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#define FP_RND_MASK 0x3
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#define _FP_DECL_EX \
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unsigned long int _fcsr __attribute__ ((unused)) = FP_RND_NEAREST
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#define FP_INIT_ROUNDMODE \
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do { \
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_fcsr = __builtin_mips_get_fcsr (); \
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} while (0)
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#define FP_ROUNDMODE (_fcsr & FP_RND_MASK)
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#define FP_TRAPPING_EXCEPTIONS ((_fcsr >> FP_EX_ENABLE_SHIFT) & FP_EX_ALL)
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#define FP_HANDLE_EXCEPTIONS \
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do { \
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_fcsr &= ~(FP_EX_ALL << FP_EX_CAUSE_SHIFT); \
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/* Also clear Unimplemented Operation. */ \
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_fcsr &= ~(1 << 17); \
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_fcsr |= _fex | (_fex << FP_EX_CAUSE_SHIFT); \
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__builtin_mips_set_fcsr (_fcsr); \
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} while (0);
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#else
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#define FP_EX_INVALID (1 << 4)
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#define FP_EX_DIVZERO (1 << 3)
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#define FP_EX_OVERFLOW (1 << 2)
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#define FP_EX_UNDERFLOW (1 << 1)
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#define FP_EX_INEXACT (1 << 0)
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#endif
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#define __LITTLE_ENDIAN 1234
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#define __BIG_ENDIAN 4321
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#if defined _MIPSEB
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# define __BYTE_ORDER __BIG_ENDIAN
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#else
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# define __BYTE_ORDER __LITTLE_ENDIAN
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#endif
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/* Define ALIASNAME as a strong alias for NAME. */
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# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
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# define _strong_alias(name, aliasname) \
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extern __typeof (name) aliasname __attribute__ ((alias (#name)));
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@ -1,8 +1 @@
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LIB2_SIDITI_CONV_FUNCS = yes
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FPBIT = true
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FPBIT_CFLAGS = -DQUIET_NAN_NEGATED
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DPBIT = true
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DPBIT_CFLAGS = -DQUIET_NAN_NEGATED
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LIB2ADD_ST += $(srcdir)/config/mips/lib2funcs.c
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1
libgcc/config/mips/t-mips64
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1
libgcc/config/mips/t-mips64
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softfp_int_modes += ti
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3
libgcc/config/mips/t-softfp-tf
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3
libgcc/config/mips/t-softfp-tf
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softfp_float_modes += tf
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softfp_extensions += sftf dftf
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softfp_truncations += tfsf tfdf
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@ -1,4 +0,0 @@
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ifeq ($(long_double_type_size),128)
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TPBIT = true
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TPBIT_CFLAGS = -DQUIET_NAN_NEGATED
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endif
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6
libgcc/configure
vendored
6
libgcc/configure
vendored
@ -4317,9 +4317,11 @@ fi
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{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgcc_cv_cfi" >&5
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$as_echo "$libgcc_cv_cfi" >&6; }
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# Check 32bit or 64bit
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# Check 32bit or 64bit. In the case of MIPS, this really determines the
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# word size rather than the address size.
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cat > conftest.c <<EOF
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#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__))
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#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__)) \
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|| defined(__mips64)
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host_address=64
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#else
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host_address=32
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@ -279,9 +279,11 @@ AC_CACHE_CHECK([whether assembler supports CFI directives], [libgcc_cv_cfi],
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[libgcc_cv_cfi=yes],
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[libgcc_cv_cfi=no])])
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# Check 32bit or 64bit
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# Check 32bit or 64bit. In the case of MIPS, this really determines the
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# word size rather than the address size.
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cat > conftest.c <<EOF
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#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__))
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#if defined(__x86_64__) || (!defined(__i386__) && defined(__LP64__)) \
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|| defined(__mips64)
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host_address=64
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#else
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host_address=32
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