From 1cdc0d8f36ebf4752ff376992344dd3a555a5ec5 Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Thu, 18 Dec 2008 22:13:05 +0000 Subject: [PATCH] rs6000.c (rs6000_generate_compare): Condition choice of e500 comparison instructions on flag_finite_math_only &&... * config/rs6000/rs6000.c (rs6000_generate_compare): Condition choice of e500 comparison instructions on flag_finite_math_only && !flag_trapping_math, not flag_unsafe_math_optimizations. * config/rs6000/rs6000.md (abstf2): Condition choice of e500 instructions on flag_finite_math_only && !flag_trapping_math, not flag_unsafe_math_optimizations. (bltgt, sltgt): Disable for TARGET_HARD_FLOAT && !TARGET_FPRS. * config/rs6000/spe.md (cmpsfeq_gpr, tstsfeq_gpr, cmpsfgt_gpr, tstsfgt_gpr, cmpsflt_gpr, tstsflt_gpr, cmpdfeq_gpr, tstdfeq_gpr, cmpdfgt_gpr, tstdfgt_gpr, cmpdflt_gpr, tstdflt_gpr, cmptfeq_gpr, tsttfeq_gpr, cmptfgt_gpr, tsttfgt_gpr, cmptflt_gpr, tsttflt_gpr): Condition choice of comparison instructions on flag_finite_math_only && !flag_trapping_math, not flag_unsafe_math_optimizations. From-SVN: r142822 --- gcc/ChangeLog | 17 +++++++++++++ gcc/config/rs6000/rs6000.c | 24 +++++++++---------- gcc/config/rs6000/rs6000.md | 6 ++--- gcc/config/rs6000/spe.md | 48 +++++++++++++++++++++++-------------- 4 files changed, 62 insertions(+), 33 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e3416094fddb..add24970820d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2008-12-18 Joseph Myers + + * config/rs6000/rs6000.c (rs6000_generate_compare): Condition + choice of e500 comparison instructions on flag_finite_math_only && + !flag_trapping_math, not flag_unsafe_math_optimizations. + * config/rs6000/rs6000.md (abstf2): Condition choice of e500 + instructions on flag_finite_math_only && !flag_trapping_math, not + flag_unsafe_math_optimizations. + (bltgt, sltgt): Disable for TARGET_HARD_FLOAT && !TARGET_FPRS. + * config/rs6000/spe.md (cmpsfeq_gpr, tstsfeq_gpr, cmpsfgt_gpr, + tstsfgt_gpr, cmpsflt_gpr, tstsflt_gpr, cmpdfeq_gpr, tstdfeq_gpr, + cmpdfgt_gpr, tstdfgt_gpr, cmpdflt_gpr, tstdflt_gpr, cmptfeq_gpr, + tsttfeq_gpr, cmptfgt_gpr, tsttfgt_gpr, cmptflt_gpr, tsttflt_gpr): + Condition choice of comparison instructions on + flag_finite_math_only && !flag_trapping_math, not + flag_unsafe_math_optimizations. + 2008-12-18 Ralf Wildenhues * configure: Regenerate. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index e2d8ddc00036..49551f61b580 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -12798,7 +12798,7 @@ rs6000_generate_compare (enum rtx_code code) switch (op_mode) { case SFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstsfeq_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpsfeq_gpr (compare_result, rs6000_compare_op0, @@ -12806,7 +12806,7 @@ rs6000_generate_compare (enum rtx_code code) break; case DFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstdfeq_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpdfeq_gpr (compare_result, rs6000_compare_op0, @@ -12814,7 +12814,7 @@ rs6000_generate_compare (enum rtx_code code) break; case TFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tsttfeq_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmptfeq_gpr (compare_result, rs6000_compare_op0, @@ -12830,7 +12830,7 @@ rs6000_generate_compare (enum rtx_code code) switch (op_mode) { case SFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstsfgt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpsfgt_gpr (compare_result, rs6000_compare_op0, @@ -12838,7 +12838,7 @@ rs6000_generate_compare (enum rtx_code code) break; case DFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstdfgt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpdfgt_gpr (compare_result, rs6000_compare_op0, @@ -12846,7 +12846,7 @@ rs6000_generate_compare (enum rtx_code code) break; case TFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tsttfgt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmptfgt_gpr (compare_result, rs6000_compare_op0, @@ -12862,7 +12862,7 @@ rs6000_generate_compare (enum rtx_code code) switch (op_mode) { case SFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstsflt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpsflt_gpr (compare_result, rs6000_compare_op0, @@ -12870,7 +12870,7 @@ rs6000_generate_compare (enum rtx_code code) break; case DFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstdflt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpdflt_gpr (compare_result, rs6000_compare_op0, @@ -12878,7 +12878,7 @@ rs6000_generate_compare (enum rtx_code code) break; case TFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tsttflt_gpr (compare_result, rs6000_compare_op0, rs6000_compare_op1) : gen_cmptflt_gpr (compare_result, rs6000_compare_op0, @@ -12913,7 +12913,7 @@ rs6000_generate_compare (enum rtx_code code) switch (op_mode) { case SFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstsfeq_gpr (compare_result2, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpsfeq_gpr (compare_result2, rs6000_compare_op0, @@ -12921,7 +12921,7 @@ rs6000_generate_compare (enum rtx_code code) break; case DFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tstdfeq_gpr (compare_result2, rs6000_compare_op0, rs6000_compare_op1) : gen_cmpdfeq_gpr (compare_result2, rs6000_compare_op0, @@ -12929,7 +12929,7 @@ rs6000_generate_compare (enum rtx_code code) break; case TFmode: - cmp = flag_unsafe_math_optimizations + cmp = (flag_finite_math_only && !flag_trapping_math) ? gen_tsttfeq_gpr (compare_result2, rs6000_compare_op0, rs6000_compare_op1) : gen_cmptfeq_gpr (compare_result2, rs6000_compare_op0, diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7a6c0369065a..a5a6ec17b269 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9002,7 +9002,7 @@ rtx label = gen_label_rtx (); if (TARGET_E500_DOUBLE) { - if (flag_unsafe_math_optimizations) + if (flag_finite_math_only && !flag_trapping_math) emit_insn (gen_spe_abstf2_tst (operands[0], operands[1], label)); else emit_insn (gen_spe_abstf2_cmp (operands[0], operands[1], label)); @@ -11854,7 +11854,7 @@ (define_expand "bltgt" [(use (match_operand 0 "" ""))] - "" + "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" "{ rs6000_emit_cbranch (LTGT, operands[0]); DONE; }") ;; For SNE, we would prefer that the xor/abs sequence be used for integers. @@ -11988,7 +11988,7 @@ (define_expand "sltgt" [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" + "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" "{ rs6000_emit_sCOND (LTGT, operands[0]); DONE; }") (define_expand "stack_protect_set" diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index 50736f1a6ba0..f8118afad226 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -2933,7 +2933,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1000))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && !(flag_finite_math_only && !flag_trapping_math)" "efscmpeq %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -2943,7 +2944,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1001))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && flag_finite_math_only && !flag_trapping_math" "efststeq %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -2953,7 +2955,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1002))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && !(flag_finite_math_only && !flag_trapping_math)" "efscmpgt %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -2963,7 +2966,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1003))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && flag_finite_math_only && !flag_trapping_math" "efststgt %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -2973,7 +2977,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1004))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && !(flag_finite_math_only && !flag_trapping_math)" "efscmplt %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -2983,7 +2988,8 @@ [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r") (match_operand:SF 2 "gpc_reg_operand" "r"))] 1005))] - "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && !TARGET_FPRS + && flag_finite_math_only && !flag_trapping_math" "efststlt %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -2995,7 +3001,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] CMPDFEQ_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmpeq %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -3005,7 +3012,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] TSTDFEQ_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && flag_finite_math_only && !flag_trapping_math" "efdtsteq %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -3015,7 +3023,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] CMPDFGT_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmpgt %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -3025,7 +3034,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] TSTDFGT_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && flag_finite_math_only && !flag_trapping_math" "efdtstgt %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -3035,7 +3045,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] CMPDFLT_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmplt %0,%1,%2" [(set_attr "type" "veccmp")]) @@ -3045,7 +3056,8 @@ [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r") (match_operand:DF 2 "gpc_reg_operand" "r"))] TSTDFLT_GPR))] - "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations" + "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE + && flag_finite_math_only && !flag_trapping_math" "efdtstlt %0,%1,%2" [(set_attr "type" "veccmpsimple")]) @@ -3059,7 +3071,7 @@ CMPTFEQ_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && !flag_unsafe_math_optimizations" + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmpeq %0,%1,%2\;bng %0,$+8\;efdcmpeq %0,%L1,%L2" [(set_attr "type" "veccmp") (set_attr "length" "12")]) @@ -3072,7 +3084,7 @@ TSTTFEQ_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && flag_unsafe_math_optimizations" + && flag_finite_math_only && !flag_trapping_math" "efdtsteq %0,%1,%2\;bng %0,$+8\;efdtsteq %0,%L1,%L2" [(set_attr "type" "veccmpsimple") (set_attr "length" "12")]) @@ -3085,7 +3097,7 @@ CMPTFGT_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && !flag_unsafe_math_optimizations" + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmpgt %0,%1,%2\;bgt %0,$+16\;efdcmpeq %0,%1,%2\;bng %0,$+8\;efdcmpgt %0,%L1,%L2" [(set_attr "type" "veccmp") (set_attr "length" "20")]) @@ -3098,7 +3110,7 @@ TSTTFGT_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && flag_unsafe_math_optimizations" + && flag_finite_math_only && !flag_trapping_math" "efdtstgt %0,%1,%2\;bgt %0,$+16\;efdtsteq %0,%1,%2\;bng %0,$+8\;efdtstgt %0,%L1,%L2" [(set_attr "type" "veccmpsimple") (set_attr "length" "20")]) @@ -3111,7 +3123,7 @@ CMPTFLT_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && !flag_unsafe_math_optimizations" + && !(flag_finite_math_only && !flag_trapping_math)" "efdcmplt %0,%1,%2\;bgt %0,$+16\;efdcmpeq %0,%1,%2\;bng %0,$+8\;efdcmplt %0,%L1,%L2" [(set_attr "type" "veccmp") (set_attr "length" "20")]) @@ -3124,7 +3136,7 @@ TSTTFLT_GPR))] "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && TARGET_LONG_DOUBLE_128 - && flag_unsafe_math_optimizations" + && flag_finite_math_only && !flag_trapping_math" "efdtstlt %0,%1,%2\;bgt %0,$+16\;efdtsteq %0,%1,%2\;bng %0,$+8\;efdtstlt %0,%L1,%L2" [(set_attr "type" "veccmpsimple") (set_attr "length" "20")])