diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eccd96c67d36..638a14911d26 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2004-03-21  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	* config/s390/s390.md ("addti3", "subti3"): New insns and splitters.
+
 2004-03-21  Ulrich Weigand  <uweigand@de.ibm.com>
 
 	* expmed.c (choose_mult_variant): Pass MULT_COST as argument instead
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 5e1398039266..8348c5a2791e 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -3330,6 +3330,35 @@
 ;;- Add instructions.
 ;;
 
+;
+; addti3 instruction pattern(s).
+;
+
+(define_insn_and_split "addti3"
+  [(set (match_operand:TI 0 "register_operand" "=&d")
+        (plus:TI (match_operand:TI 1 "nonimmediate_operand" "%0")
+                 (match_operand:TI 2 "general_operand" "do") ) )
+   (clobber (reg:CC 33))]
+  "TARGET_64BIT"
+  "#"
+  "&& reload_completed"
+  [(parallel
+    [(set (reg:CCL1 33)
+          (compare:CCL1 (plus:DI (match_dup 7) (match_dup 8))
+                        (match_dup 7)))
+     (set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))])
+   (parallel
+    [(set (match_dup 3) (plus:DI (plus:DI (match_dup 4) (match_dup 5))
+                                 (ltu:DI (reg:CCL1 33) (const_int 0))))
+     (clobber (reg:CC 33))])]
+  "operands[3] = operand_subword (operands[0], 0, 0, TImode);
+   operands[4] = operand_subword (operands[1], 0, 0, TImode);
+   operands[5] = operand_subword (operands[2], 0, 0, TImode);
+   operands[6] = operand_subword (operands[0], 1, 0, TImode);
+   operands[7] = operand_subword (operands[1], 1, 0, TImode);
+   operands[8] = operand_subword (operands[2], 1, 0, TImode);"
+  [(set_attr "op_type"  "NN")])
+
 ;
 ; adddi3 instruction pattern(s).
 ;
@@ -3825,6 +3854,35 @@
 ;;- Subtract instructions.
 ;;
 
+;
+; subti3 instruction pattern(s).
+;
+
+(define_insn_and_split "subti3"
+  [(set (match_operand:TI 0 "register_operand" "=&d")
+        (minus:TI (match_operand:TI 1 "register_operand" "0")
+                  (match_operand:TI 2 "general_operand" "do") ) )
+   (clobber (reg:CC 33))]
+  "TARGET_64BIT"
+  "#"
+  "&& reload_completed"
+  [(parallel
+    [(set (reg:CCL2 33)
+          (compare:CCL2 (minus:DI (match_dup 7) (match_dup 8))
+                        (match_dup 7)))
+     (set (match_dup 6) (minus:DI (match_dup 7) (match_dup 8)))])
+   (parallel
+    [(set (match_dup 3) (minus:DI (minus:DI (match_dup 4) (match_dup 5))
+                                  (gtu:DI (reg:CCL2 33) (const_int 0))))
+     (clobber (reg:CC 33))])]
+  "operands[3] = operand_subword (operands[0], 0, 0, TImode);
+   operands[4] = operand_subword (operands[1], 0, 0, TImode);
+   operands[5] = operand_subword (operands[2], 0, 0, TImode);
+   operands[6] = operand_subword (operands[0], 1, 0, TImode);
+   operands[7] = operand_subword (operands[1], 1, 0, TImode);
+   operands[8] = operand_subword (operands[2], 1, 0, TImode);"
+  [(set_attr "op_type"  "NN")])
+
 ;
 ; subdi3 instruction pattern(s).
 ;