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From-SVN: r810
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@ -46,7 +46,7 @@ extern char *ctime ();
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extern int flag_traditional;
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extern FILE *asm_out_file;
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static char out_sccs_id[] = "@(#)m88k.c 2.1.3.1 07 Apr 1992 17:23:59";
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static char out_sccs_id[] = "@(#)m88k.c 2.1.4.6 20 Apr 1992 14:30:40";
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static char tm_sccs_id [] = TM_SCCS_ID;
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char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
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@ -718,11 +718,14 @@ output_call (operands, addr)
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if (final_sequence)
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{
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rtx jump;
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rtx seq_insn;
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/* This can be generalized, but there is currently no need. */
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if (XVECLEN (final_sequence, 0) != 2)
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abort ();
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/* The address of interior insns is not computed, so use the sequence. */
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seq_insn = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
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jump = XVECEXP (final_sequence, 0, 1);
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if (GET_CODE (jump) == JUMP_INSN)
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{
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@ -730,7 +733,8 @@ output_call (operands, addr)
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char *last;
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rtx dest = XEXP (SET_SRC (PATTERN (jump)), 0);
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int delta = 4 * (insn_addresses[INSN_UID (dest)]
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- insn_addresses[INSN_UID (jump)]);
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- insn_addresses[INSN_UID (seq_insn)]
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- 2);
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#if (MONITOR_GCC & 0x2) /* How often do long branches happen? */
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if ((unsigned) (delta + 0x8000) >= 0x10000)
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warning ("Internal gcc monitor: short-branch(%x)", delta);
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@ -818,6 +822,92 @@ output_short_branch_defs (stream)
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abort ();
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}
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/* Return truth value of the statement that this conditional branch is likely
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to fall through. CONDITION, is the condition that JUMP_INSN is testing. */
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int
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mostly_false_jump (jump_insn, condition)
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rtx jump_insn, condition;
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{
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rtx target_label = JUMP_LABEL (jump_insn);
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rtx insnt, insnj;
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/* Much of this isn't computed unless we're optimizing. */
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if (optimize == 0)
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return 0;
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/* Determine if one path or the other leads to a return. */
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for (insnt = NEXT_INSN (target_label);
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insnt;
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insnt = NEXT_INSN (insnt))
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if (GET_CODE (insnt) == JUMP_INSN
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|| (GET_CODE (insnt) == SEQUENCE
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&& GET_CODE (XVECEXP (insnt, 0, 0)) == JUMP_INSN))
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break;
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if (insnt && GET_CODE (PATTERN (insnt)) == RETURN)
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insnt = 0;
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for (insnj = NEXT_INSN (jump_insn);
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insnj;
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insnj = NEXT_INSN (insnj))
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if (GET_CODE (insnj) == JUMP_INSN
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|| (GET_CODE (insnj) == SEQUENCE
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&& GET_CODE (XVECEXP (insnj, 0, 0)) == JUMP_INSN))
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break;
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if (insnj && GET_CODE (PATTERN (insnj)) == RETURN)
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insnj = 0;
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/* Predict to not return. */
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if (insnt != insnj)
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return (insnt == 0);
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/* Predict loops to loop. */
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for (insnt = PREV_INSN (target_label);
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insnt && GET_CODE (insnt) == NOTE;
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insnt = PREV_INSN (insnt))
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if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_END)
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return 1;
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else if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_BEG)
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return 0;
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else if (NOTE_LINE_NUMBER (insnt) == NOTE_INSN_LOOP_CONT)
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return 0;
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/* Predict backward branches usually take. */
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if (final_sequence)
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insnj = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
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else
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insnj = jump_insn;
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if (insn_addresses[INSN_UID (insnj)]
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> insn_addresses[INSN_UID (target_label)])
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return 0;
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/* EQ tests are usually false and NE tests are usually true. Also,
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most quantities are positive, so we can make the appropriate guesses
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about signed comparisons against zero. */
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switch (GET_CODE (condition))
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{
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case CONST_INT:
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/* Unconditional branch. */
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return 0;
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case EQ:
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return 1;
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case NE:
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return 0;
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case LE:
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case LT:
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if (XEXP (condition, 1) == const0_rtx)
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return 1;
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break;
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case GE:
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case GT:
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if (XEXP (condition, 1) == const0_rtx)
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return 0;
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break;
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}
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return 0;
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}
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/* Report errors on floating point, if we are given NaN's, or such. Leave
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the number as is, though, since we output the number in hex, and the
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assembler won't choke on it. */
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@ -204,9 +204,9 @@ extern char * reg_names[];
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/* Print subsidiary information on the compiler version in use.
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Redefined in m88kv4.h, and m88kluna.h. */
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#define VERSION_INFO1 "88open OCS/BCS, "
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#define VERSION_INFO2 "07 Apr 1992"
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#define VERSION_INFO2 "21 Apr 1992"
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#define VERSION_STRING version_string
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#define TM_SCCS_ID "@(#)m88k.h 2.1.3.1 07 Apr 1992 17:24:45"
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#define TM_SCCS_ID "@(#)m88k.h 2.1.4.5 21 Apr 1992 08:02:51"
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/* Run-time compilation parameters selecting different hardware subsets. */
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@ -1469,6 +1469,11 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
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so give the MEM rtx word mode. */
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#define FUNCTION_MODE SImode
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/* A barrier will be aligned so account for the possible expansion. */
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#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
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if (GET_CODE (INSN) == BARRIER) \
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LENGTH += 1;
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/* Compute the cost of computing a constant rtl expression RTX
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whose rtx-code is CODE. The body of this macro is a portion
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of a switch statement. If the code is computed here,
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@ -1551,7 +1556,6 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
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/* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
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#undef INT_ASM_OP
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#undef ASCII_DATA_ASM_OP
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#undef INIT_SECTION_ASM_OP
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#undef CONST_SECTION_ASM_OP
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#undef CTORS_SECTION_ASM_OP
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#undef DTORS_SECTION_ASM_OP
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@ -2261,6 +2265,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
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#else /* m88kluna or other not based on svr[34].h. */
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#undef INIT_SECTION_ASM_OP
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#define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
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#define CONST_SECTION_FUNCTION \
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void \
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@ -28,7 +28,7 @@
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(define_expand "m88k_sccs_id"
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[(match_operand:SI 0 "" "")]
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""
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"{ static char sccs_id[] = \"@(#)m88k.md 2.1.4.2 15 Apr 1992 15:39:48\";
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"{ static char sccs_id[] = \"@(#)m88k.md 2.1.4.3 20 Apr 1992 10:42:47\";
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FAIL; }")
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;; Attribute specifications
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@ -995,7 +995,13 @@
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(match_operand 2 "pc_or_label_ref" "")
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(match_operand 3 "pc_or_label_ref" "")))]
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""
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"bb1%. %R3%C0,%1,%P2%P3"
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"*
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{
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if (mostly_false_jump (insn, operands[0]))
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return \"bb0%. %R2%C0,%1,%P2%P3\";
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else
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return \"bb1%. %R3%C0,%1,%P2%P3\";
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}"
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[(set_attr "type" "branch")])
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;; SImode move instructions
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